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Thu, 06 Dec 2018 12:32:23 -0800 (PST) Date: Thu, 06 Dec 2018 12:32:23 -0800 (PST) X-Google-Original-Date: Thu, 06 Dec 2018 12:27:17 PST (-0800) Subject: Re: [PATCH] clocksource: riscv_timer: Provide sched_clock In-Reply-To: <20181203123524.11778-1-anup@brainfault.org> From: Palmer Dabbelt To: anup@brainfault.org Message-ID: Mime-Version: 1.0 (MHng) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181206_123236_688627_02C86E46 X-CRM114-Status: GOOD ( 15.01 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aou@eecs.berkeley.edu, anup@brainfault.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, Christoph Hellwig , atish.patra@wdc.com, tglx@linutronix.de, linux-riscv@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 03 Dec 2018 04:35:24 PST (-0800), anup@brainfault.org wrote: > Currently, we don't have a sched_clock registered for RISC-V systems. > This means Linux time keeping will use jiffies (running at HZ) as the > default sched_clock. > > To avoid this, we explicity provide sched_clock using RISC-V rdtime > instruction (similar to riscv_timer clocksource). > > Signed-off-by: Anup Patel > --- > drivers/clocksource/riscv_timer.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c > index 084e97dc10ed..431892200a08 100644 > --- a/drivers/clocksource/riscv_timer.c > +++ b/drivers/clocksource/riscv_timer.c > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs) > return get_cycles64(); > } > > +static u64 riscv_sched_clock(void) > +{ > + return get_cycles64(); > +} > + > static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { > .name = "riscv_clocksource", > .rating = 300, > @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n) > cs = per_cpu_ptr(&riscv_clocksource, cpuid); > clocksource_register_hz(cs, riscv_timebase); > > + sched_clock_register(riscv_sched_clock, > + BITS_PER_LONG, riscv_timebase); Shouldn't this just be 64, not BITS_PER_LONG? We have 64-bit counters on RV32I. > + > error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, > "clockevents/riscv/timer:starting", > riscv_timer_starting_cpu, riscv_timer_dying_cpu); _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv