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From: Palmer Dabbelt <palmer@sifive.com>
To: daniel.lezcano@linaro.org
Cc: robh@kernel.org, aou@eecs.berkeley.edu, jason@lakedaemon.net,
	alankao@andestech.com, dmitriy@oss-tech.org, anup@brainfault.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	johan@kernel.org, linux-kernel@vger.kernel.org,
	atish.patra@wdc.com, schwab@suse.de, marc.zyngier@arm.com,
	linux-riscv@lists.infradead.org, tglx@linutronix.de
Subject: Re: [v4 PATCH 6/8] clocksource/drivers/riscv: Add required checks during clock source init
Date: Wed, 13 Feb 2019 16:37:52 -0800 (PST)	[thread overview]
Message-ID: <mhng-82b44439-e7ff-4464-9c9f-67c7eb686ecf@palmer-si-x1c4> (raw)
In-Reply-To: <7bd250fb-c896-64e1-d73b-6f3dd284e2d6@linaro.org>

On Wed, 13 Feb 2019 00:48:24 PST (-0800), daniel.lezcano@linaro.org wrote:
> On 12/02/2019 12:10, Atish Patra wrote:
>> Currently, clocksource registration happens for an invalid cpu for
>> non-smp kernels. This lead to kernel panic as cpu hotplug registration
>> will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return
>> errors now.
>>
>> Do not proceed if hartid or cpuid is invalid. Take this opprtunity to
>> print appropriate error strings for different failure cases.
>>
>> Signed-off-by: Atish Patra <atish.patra@wdc.com>
>
> Do you want me to take it through my tree ?

Works for me.  Aside from the typo:

Reviewed-by: Palmer Dabbelt <palmer@sifive.com>

>
>
>> ---
>>  drivers/clocksource/timer-riscv.c | 23 ++++++++++++++++++++---
>>  1 file changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
>> index 43189220..e8163693 100644
>> --- a/drivers/clocksource/timer-riscv.c
>> +++ b/drivers/clocksource/timer-riscv.c
>> @@ -95,13 +95,30 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>>  	struct clocksource *cs;
>>
>>  	hartid = riscv_of_processor_hartid(n);
>> +	if (hartid < 0) {
>> +		pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
>> +			n, hartid);
>> +		return hartid;
>> +	}
>> +
>>  	cpuid = riscv_hartid_to_cpuid(hartid);
>> +	if (cpuid < 0) {
>> +		pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
>> +		return cpuid;
>> +	}
>>
>>  	if (cpuid != smp_processor_id())
>>  		return 0;
>>
>> +	pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
>> +	       __func__, cpuid, hartid);

My only comment is that we flipped back and forth on whether or not to print 
info on driver initialization.  I like it because I have to go add the prints 
in to debug things, but IIRC we removed it at some point (probably more than 
once, as I have to keep adding these sorts of things back in and forget to 
remove them).

The review stands either way :)

>>  	cs = per_cpu_ptr(&riscv_clocksource, cpuid);
>> -	clocksource_register_hz(cs, riscv_timebase);
>> +	error = clocksource_register_hz(cs, riscv_timebase);
>> +	if (error) {
>> +		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
>> +		       error, cpuid);
>> +		return error;
>> +	}
>>
>>  	sched_clock_register(riscv_sched_clock,
>>  			BITS_PER_LONG, riscv_timebase);
>> @@ -110,8 +127,8 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>>  			 "clockevents/riscv/timer:starting",
>>  			 riscv_timer_starting_cpu, riscv_timer_dying_cpu);
>>  	if (error)
>> -		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
>> -		       error, cpuid);
>> +		pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
>> +		       error);
>>  	return error;
>>  }
>>
>>

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  reply	other threads:[~2019-02-14  0:38 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-12 11:10 [v4 PATCH 0/8] Various SMP related fixes Atish Patra
2019-02-12 11:10 ` [v4 PATCH 1/8] RISC-V: Do not wait indefinitely in __cpu_up Atish Patra
2019-02-12 11:10 ` [v4 PATCH 2/8] RISC-V: Move cpuid to hartid mapping to SMP Atish Patra
2019-02-12 11:10 ` [v4 PATCH 3/8] RISC-V: Remove NR_CPUs check during hartid search from DT Atish Patra
2019-02-12 11:10 ` [v4 PATCH 4/8] RISC-V: Allow hartid-to-cpuid function to fail Atish Patra
2019-02-12 11:10 ` [v4 PATCH 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping Atish Patra
2019-02-12 11:10 ` [v4 PATCH 6/8] clocksource/drivers/riscv: Add required checks during clock source init Atish Patra
2019-02-13  6:43   ` Anup Patel
2019-02-13  8:48   ` Daniel Lezcano
2019-02-14  0:37     ` Palmer Dabbelt [this message]
2019-02-12 11:10 ` [v4 PATCH 7/8] irqchip/irq-sifive-plic: Check and continue in case of an invalid cpuid Atish Patra
2019-02-14 12:24   ` Marc Zyngier
2019-02-12 11:10 ` [v4 PATCH 8/8] RISC-V: Assign hwcap as per comman capabilities Atish Patra
2019-02-12 11:25   ` Johan Hovold
2019-02-12 19:58     ` Atish Patra
2019-02-13  8:44       ` Johan Hovold
2019-02-13 19:59         ` Atish Patra
2019-02-14  0:37         ` Palmer Dabbelt
2019-02-14 23:49           ` Atish Patra
2019-02-22 19:21             ` Atish Patra

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