Linux-RISC-V Archive on lore.kernel.org
 help / color / Atom feed
From: Palmer Dabbelt <palmer@dabbelt.com>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: aou@eecs.berkeley.edu, vincent.chen@sifive.com,
	Anup Patel <Anup.Patel@wdc.com>,
	linux-kernel@vger.kernel.org, sudeep.holla@arm.com,
	Atish Patra <Atish.Patra@wdc.com>,
	zong.li@sifive.com, Paul Walmsley <paul.walmsley@sifive.com>,
	greentime.hu@sifive.com, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/4] RISC-V: Setup exception vector early
Date: Fri, 24 Jul 2020 22:12:38 -0700 (PDT)
Message-ID: <mhng-8ce8d920-4b65-432c-8b51-8d81f55936c0@palmerdabbelt-glaptop1> (raw)
In-Reply-To: <20200715233009.27183-2-atish.patra@wdc.com>

On Wed, 15 Jul 2020 16:30:06 PDT (-0700), Atish Patra wrote:
> The trap vector is set only in trap_init which may be too late in some
> cases. Early ioremap/efi spits many warning messages which may be useful.
>
> Setup the trap vector early so that any warning/bug can be handled before
> generic code invokes trap_init.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  arch/riscv/kernel/head.S    | 10 ++++++++--
>  arch/riscv/kernel/smpboot.c |  1 -
>  arch/riscv/kernel/traps.c   |  8 +-------
>  3 files changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 7ed1b22950fd..d0c5c316e9bb 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -77,10 +77,16 @@ relocate:
>  	csrw CSR_SATP, a0
>  .align 2
>  1:
> -	/* Set trap vector to spin forever to help debug */
> -	la a0, .Lsecondary_park
> +	/* Set trap vector to exception handler */
> +	la a0, handle_exception
>  	csrw CSR_TVEC, a0
>
> +	/*
> +	 * Set sup0 scratch register to 0, indicating to exception vector that
> +	 * we are presently executing in kernel.
> +	 */
> +	csrw CSR_SCRATCH, zero
> +
>  	/* Reload the global pointer */
>  .option push
>  .option norelax
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index 4e9922790f6e..5a9c127a380e 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -154,7 +154,6 @@ asmlinkage __visible void smp_callin(void)
>  	mmgrab(mm);
>  	current->active_mm = mm;
>
> -	trap_init();
>  	notify_cpu_starting(smp_processor_id());
>  	update_siblings_masks(smp_processor_id());
>  	set_cpu_online(smp_processor_id(), 1);
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index 7d95cce5e47c..ad14f4466d92 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -174,13 +174,7 @@ int is_valid_bugaddr(unsigned long pc)
>  }
>  #endif /* CONFIG_GENERIC_BUG */
>
> +/* stvec & scratch is already set from head.S */
>  void trap_init(void)
>  {
> -	/*
> -	 * Set sup0 scratch register to 0, indicating to exception vector
> -	 * that we are presently executing in the kernel
> -	 */
> -	csr_write(CSR_SCRATCH, 0);
> -	/* Set the exception vector address */
> -	csr_write(CSR_TVEC, &handle_exception);
>  }

While I think these are all actual fixes, it's pretty late in the cycle here so
I'm going to a bit on the careful side and only take the patches that actually
manifest as bugs in the current port.  Assuming this doesn't manifest until
early_ioremap is enabled (and we don't do that yet), I've put it on for-next.

LMK if I'm wrong about this, or the following ones.

Thanks!

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply index

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-15 23:30 [PATCH 0/4] Few mm & exception handling fixes Atish Patra
2020-07-15 23:30 ` [PATCH 1/4] RISC-V: Setup exception vector early Atish Patra
2020-07-25  5:12   ` Palmer Dabbelt [this message]
2020-07-25  5:26     ` Atish Patra
2020-07-15 23:30 ` [PATCH 2/4] RISC-V: Set maximum number of mapped pages correctly Atish Patra
2020-07-25  5:12   ` Palmer Dabbelt
2020-07-15 23:30 ` [PATCH 3/4] RISC-V: Do not rely on initrd_start/end computed during early dt parsing Atish Patra
2020-07-25  5:12   ` Palmer Dabbelt
2020-07-25  5:44     ` Atish Patra
2020-07-15 23:30 ` [PATCH 4/4] riscv: Parse all memory blocks to remove unusable memory Atish Patra
2020-07-25  5:12   ` Palmer Dabbelt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=mhng-8ce8d920-4b65-432c-8b51-8d81f55936c0@palmerdabbelt-glaptop1 \
    --to=palmer@dabbelt.com \
    --cc=Anup.Patel@wdc.com \
    --cc=Atish.Patra@wdc.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=greentime.hu@sifive.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=paul.walmsley@sifive.com \
    --cc=sudeep.holla@arm.com \
    --cc=vincent.chen@sifive.com \
    --cc=zong.li@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Linux-RISC-V Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/linux-riscv/0 linux-riscv/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 linux-riscv linux-riscv/ https://lore.kernel.org/linux-riscv \
		linux-riscv@lists.infradead.org
	public-inbox-index linux-riscv

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.infradead.lists.linux-riscv


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git