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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id n48sm3804061pfv.130.2021.04.23.00.15.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Apr 2021 00:15:55 -0700 (PDT) Date: Fri, 23 Apr 2021 00:15:55 -0700 (PDT) X-Google-Original-Date: Fri, 23 Apr 2021 00:15:53 PDT (-0700) Subject: Re: [PATCH] RISC-V: Fix error code returned by riscv_hartid_to_cpuid() In-Reply-To: <20210415085522.108624-1-anup.patel@wdc.com> CC: Paul Walmsley , aou@eecs.berkeley.edu, Atish Patra , Alistair Francis , anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , stable@vger.kernel.org From: Palmer Dabbelt To: Anup Patel Message-ID: Mime-Version: 1.0 (MHng) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210423_001600_383459_D24BDC2B X-CRM114-Status: GOOD ( 20.08 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, 15 Apr 2021 01:55:22 PDT (-0700), Anup Patel wrote: > We should return a negative error code upon failure in Not just should: the PLIC driver assumed this was the return flavor and will overflow a per_cpu because it doesn't detect the error. IIUC this will manifest if we have more harts that NR_CPUS, which is a possible configuration. That said, it's gone unnoticed for ~3 years so I'm inclined to leave it out of fixes because I have nothing else and this late in the cycle is always a bit touchy. It's kind of splitting hairs as it'll just get backported, but post-rc8 is an odd spot to be in. Is this actually manifesting as a crash for you? Sorry I missed this last week. > riscv_hartid_to_cpuid() instead of NR_CPUS. This is also > aligned with all uses of riscv_hartid_to_cpuid() which > expect negative error code upon failure. > > Fixes: 6825c7a80f18 ("RISC-V: Add logical CPU indexing for RISC-V") Also Fixes: f99fb607fb2b ("RISC-V: Use Linux logical CPU number instead of hartid") which is what actually manifests the bug -- again, kind of splitting hairs as it's the patch after. > Cc: stable@vger.kernel.org > Signed-off-by: Anup Patel > --- > arch/riscv/kernel/smp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c > index ea028d9e0d24..d44567490d91 100644 > --- a/arch/riscv/kernel/smp.c > +++ b/arch/riscv/kernel/smp.c > @@ -54,7 +54,7 @@ int riscv_hartid_to_cpuid(int hartid) > return i; > > pr_err("Couldn't find cpu id for hartid [%d]\n", hartid); > - return i; > + return -ENOENT; > } > > void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out) _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv