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From: Palmer Dabbelt <palmer@sifive.com>
To: anup@brainfault.org
Cc: aou@eecs.berkeley.edu, anup@brainfault.org,
	daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org,
	Christoph Hellwig <hch@infradead.org>,
	atish.patra@wdc.com, tglx@linutronix.de,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 2/2] clocksource: riscv_timer: Provide sched_clock
Date: Fri, 07 Dec 2018 09:58:57 -0800 (PST)
Message-ID: <mhng-bc852f88-ce32-4f21-a9fa-d67d50f24f2d@palmer-si-x1c4> (raw)
In-Reply-To: <20181204102952.21297-3-anup@brainfault.org>

On Tue, 04 Dec 2018 02:29:52 PST (-0800), anup@brainfault.org wrote:
> Currently, we don't have a sched_clock registered for RISC-V systems.
> This means Linux time keeping will use jiffies (running at HZ) as the
> default sched_clock.
>
> To avoid this, we explicity provide sched_clock using RISC-V rdtime
> instruction (similar to riscv_timer clocksource).
>
> Signed-off-by: Anup Patel <anup@brainfault.org>
> ---
>  drivers/clocksource/Kconfig       | 2 +-
>  drivers/clocksource/riscv_timer.c | 9 +++++++++
>  2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 55c77e44bb2d..19649abd7c75 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -611,7 +611,7 @@ config ATCPIT100_TIMER
>
>  config RISCV_TIMER
>  	bool "Timer for the RISC-V platform"
> -	depends on RISCV
> +	depends on GENERIC_SCHED_CLOCK && RISCV
>  	default y
>  	select TIMER_PROBE
>  	select TIMER_OF
> diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
> index 084e97dc10ed..431892200a08 100644
> --- a/drivers/clocksource/riscv_timer.c
> +++ b/drivers/clocksource/riscv_timer.c
> @@ -8,6 +8,7 @@
>  #include <linux/cpu.h>
>  #include <linux/delay.h>
>  #include <linux/irq.h>
> +#include <linux/sched_clock.h>
>  #include <asm/smp.h>
>  #include <asm/sbi.h>
>
> @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
>  	return get_cycles64();
>  }
>
> +static u64 riscv_sched_clock(void)
> +{
> +	return get_cycles64();
> +}
> +
>  static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
>  	.name		= "riscv_clocksource",
>  	.rating		= 300,
> @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>  	cs = per_cpu_ptr(&riscv_clocksource, cpuid);
>  	clocksource_register_hz(cs, riscv_timebase);
>
> +	sched_clock_register(riscv_sched_clock,
> +			BITS_PER_LONG, riscv_timebase);
> +
>  	error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
>  			 "clockevents/riscv/timer:starting",
>  			 riscv_timer_starting_cpu, riscv_timer_dying_cpu);

Reviewed-by: Palmer Dabbelt <palmer@sifive.com>

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Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04 10:29 [PATCH v2 0/2] Provide sched_clock for riscv_timer Anup Patel
2018-12-04 10:29 ` [PATCH v2 1/2] RISC-V: Select GENERIC_SCHED_CLOCK for clocksource drivers Anup Patel
2018-12-07 17:58   ` Palmer Dabbelt
2018-12-04 10:29 ` [PATCH v2 2/2] clocksource: riscv_timer: Provide sched_clock Anup Patel
2018-12-07 17:58   ` Palmer Dabbelt [this message]
2018-12-07 17:59 ` [PATCH v2 0/2] Provide sched_clock for riscv_timer Palmer Dabbelt
2018-12-09 16:30   ` Daniel Lezcano
2018-12-10 17:31     ` Palmer Dabbelt

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