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From: Palmer Dabbelt <palmerdabbelt@google.com>
To: Björn Töpel <bjorn.topel@gmail.com>
Cc: daniel@iogearbox.net, netdev@vger.kernel.org, ast@kernel.org,
	Björn Töpel <bjorn.topel@gmail.com>,
	linux-riscv@lists.infradead.org, bpf@vger.kernel.org
Subject: Re: [PATCH bpf-next 1/8] riscv, bpf: fix broken BPF tail calls
Date: Thu, 19 Dec 2019 13:59:19 -0800 (PST)	[thread overview]
Message-ID: <mhng-dcf9c2f9-7955-4645-a229-d31bbaf96127@palmerdabbelt-glaptop> (raw)
In-Reply-To: <20191209173136.29615-2-bjorn.topel@gmail.com>

On Mon, 09 Dec 2019 09:31:29 PST (-0800), Björn Töpel wrote:
> The BPF JIT incorrectly clobbered the a0 register, and did not flag
> usage of s5 register when BPF stack was being used.
>
> Fixes: 2353ecc6f91f ("bpf, riscv: add BPF JIT for RV64G")
> Signed-off-by: Björn Töpel <bjorn.topel@gmail.com>
> ---
>  arch/riscv/net/bpf_jit_comp.c | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/net/bpf_jit_comp.c b/arch/riscv/net/bpf_jit_comp.c
> index 5451ef3845f2..1606ebd49666 100644
> --- a/arch/riscv/net/bpf_jit_comp.c
> +++ b/arch/riscv/net/bpf_jit_comp.c
> @@ -120,6 +120,11 @@ static bool seen_reg(int reg, struct rv_jit_context *ctx)
>  	return false;
>  }
>
> +static void mark_fp(struct rv_jit_context *ctx)
> +{
> +	__set_bit(RV_CTX_F_SEEN_S5, &ctx->flags);
> +}
> +
>  static void mark_call(struct rv_jit_context *ctx)
>  {
>  	__set_bit(RV_CTX_F_SEEN_CALL, &ctx->flags);
> @@ -596,7 +601,8 @@ static void __build_epilogue(u8 reg, struct rv_jit_context *ctx)
>
>  	emit(rv_addi(RV_REG_SP, RV_REG_SP, stack_adjust), ctx);
>  	/* Set return value. */
> -	emit(rv_addi(RV_REG_A0, RV_REG_A5, 0), ctx);
> +	if (reg == RV_REG_RA)
> +		emit(rv_addi(RV_REG_A0, RV_REG_A5, 0), ctx);
>  	emit(rv_jalr(RV_REG_ZERO, reg, 0), ctx);
>  }
>
> @@ -1426,6 +1432,10 @@ static void build_prologue(struct rv_jit_context *ctx)
>  {
>  	int stack_adjust = 0, store_offset, bpf_stack_adjust;
>
> +	bpf_stack_adjust = round_up(ctx->prog->aux->stack_depth, 16);
> +	if (bpf_stack_adjust)
> +		mark_fp(ctx);
> +
>  	if (seen_reg(RV_REG_RA, ctx))
>  		stack_adjust += 8;
>  	stack_adjust += 8; /* RV_REG_FP */
> @@ -1443,7 +1453,6 @@ static void build_prologue(struct rv_jit_context *ctx)
>  		stack_adjust += 8;
>
>  	stack_adjust = round_up(stack_adjust, 16);
> -	bpf_stack_adjust = round_up(ctx->prog->aux->stack_depth, 16);
>  	stack_adjust += bpf_stack_adjust;
>
>  	store_offset = stack_adjust - 8;

Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>

and I'm assuming these are going in through a BPF tree, so also

Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>

but LMK if you want it through the RISC-V tree.


      parent reply	other threads:[~2019-12-19 22:03 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-09 17:31 [PATCH bpf-next 0/8] riscv: BPF JIT fix, optimizations and far jumps support Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 1/8] riscv, bpf: fix broken BPF tail calls Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 2/8] riscv, bpf: add support for far branching Björn Töpel
2019-12-09 21:08   ` Luke Nelson
2019-12-09 21:27     ` Daniel Borkmann
2019-12-10  7:02       ` Luke Nelson
2019-12-10  5:32     ` Björn Töpel
2019-12-10  5:31   ` Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 3/8] riscv, bpf: add support for far jumps and exits Björn Töpel
2019-12-09 21:15   ` Luke Nelson
2019-12-09 17:31 ` [PATCH bpf-next 4/8] riscv, bpf: optimize BPF tail calls Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 5/8] riscv, bpf: provide RISC-V specific JIT image alloc/free Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 6/8] riscv, bpf: optimize calls Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 7/8] riscv, bpf: add missing uapi header for BPF_PROG_TYPE_PERF_EVENT programs Björn Töpel
2019-12-09 17:31 ` [PATCH bpf-next 8/8] riscv, perf: add arch specific perf_arch_bpf_user_pt_regs Björn Töpel
2019-12-19 21:59 ` Palmer Dabbelt [this message]

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