From: Johan Jonker <jbx6244@gmail.com>
To: linus.walleij@linaro.org, brgl@bgdev.pl
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
heiko@sntech.de, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
kever.yang@rock-chips.com, sjg@chromium.org,
philipp.tomsich@vrull.eu, john@metanate.com,
quentin.schulz@theobroma-systems.com
Subject: [PATCH v2 8/8] ARM: dts: rockchip: rk3066a: move gpio nodes to root
Date: Sat, 21 Jan 2023 12:10:03 +0100 [thread overview]
Message-ID: <0266aabd-2991-2958-ab1e-55f58ab14461@gmail.com> (raw)
In-Reply-To: <03627216-54b5-5d9b-f91d-adcd637819e3@gmail.com>
The relation between gpio and pinctrl is now described
by the gpio-ranges property. Move rk3066a gpio nodes to root.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
arch/arm/boot/dts/rk3066a.dtsi | 159 +++++++++++++++------------------
1 file changed, 72 insertions(+), 87 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 4d7cf6f1b..ac329cf14 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -217,6 +217,18 @@
<150000000>, <75000000>;
};
+ gpio6: gpio@2000a000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2000a000 0x100>;
+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO6>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 192 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
timer2: timer@2000e000 {
compatible = "snps,dw-apb-timer";
reg = <0x2000e000 0x100>;
@@ -238,6 +250,18 @@
};
};
+ gpio0: gpio@20034000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20034000 0x100>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO0>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
timer0: timer@20038000 {
compatible = "snps,dw-apb-timer";
reg = <0x20038000 0x100>;
@@ -254,6 +278,30 @@
clock-names = "timer", "pclk";
};
+ gpio1: gpio@2003c000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2003c000 0x100>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO1>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@2003e000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x2003e000 0x100>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO2>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
tsadc: tsadc@20060000 {
compatible = "rockchip,rk3066-tsadc";
reg = <0x20060000 0x100>;
@@ -266,96 +314,33 @@
status = "disabled";
};
+ gpio3: gpio@20080000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20080000 0x100>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO3>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio4: gpio@20084000 {
+ compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
+ reg = <0x20084000 0x100>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_GPIO4>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3066a-pinctrl";
rockchip,grf = <&grf>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio@20034000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20034000 0x100>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO0>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 0 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@2003c000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2003c000 0x100>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO1>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 32 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@2003e000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2003e000 0x100>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO2>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 64 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@20080000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20080000 0x100>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO3>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 96 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio4: gpio@20084000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x20084000 0x100>;
- interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO4>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 128 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio6: gpio@2000a000 {
- compatible = "rockchip,rk3066a-gpio-bank", "rockchip,gpio-bank";
- reg = <0x2000a000 0x100>;
- interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru PCLK_GPIO6>;
-
- gpio-controller;
- gpio-ranges = <&pinctrl 0 192 32>;
- #gpio-cells = <2>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
pcfg_pull_default: pcfg-pull-default {
bias-pull-pin-default;
--
2.20.1
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next prev parent reply other threads:[~2023-01-21 11:11 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-21 11:06 [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Johan Jonker
2023-01-21 11:08 ` [PATCH v2 2/8] dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated Johan Jonker
2023-01-22 13:53 ` Krzysztof Kozlowski
2023-01-26 13:45 ` Linus Walleij
2023-02-05 17:20 ` Johan Jonker
2023-02-06 11:26 ` Linus Walleij
2023-01-21 11:08 ` [PATCH v2 3/8] gpio: gpio-rockchip: parse gpio-ranges for bank id Johan Jonker
2023-01-26 13:47 ` Linus Walleij
2023-03-02 3:29 ` Kever Yang
2023-01-21 11:08 ` [PATCH v2 4/8] ARM: dts: rockchip: add gpio-ranges property to gpio nodes Johan Jonker
2023-03-02 6:37 ` Kever Yang
2023-01-21 11:09 ` [PATCH v2 5/8] arm64: " Johan Jonker
2023-03-02 6:38 ` Kever Yang
2023-01-21 11:09 ` [PATCH v2 6/8] ARM: dts: rockchip: replace compatible " Johan Jonker
2023-01-21 11:09 ` [PATCH v2 7/8] arm64: " Johan Jonker
2023-01-21 11:10 ` Johan Jonker [this message]
2023-01-22 13:52 ` [PATCH v2 1/8] dt-bindings: gpio: rockchip,gpio-bank: add compatible string per SoC Krzysztof Kozlowski
2023-01-26 13:44 ` Linus Walleij
2023-02-08 11:08 ` Linus Walleij
2023-02-10 20:03 ` Bartosz Golaszewski
2023-02-12 16:14 ` Krzysztof Kozlowski
2023-02-15 15:02 ` Bartosz Golaszewski
2023-02-15 16:14 ` Johan Jonker
2023-02-15 20:15 ` Krzysztof Kozlowski
2023-02-15 21:01 ` [PATCH v3] " Johan Jonker
2023-02-16 10:41 ` Krzysztof Kozlowski
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