From: Adam Ford <aford173@gmail.com>
To: linux-media@vger.kernel.org
Cc: abel.vesa@nxp.com, aford@beaconembedded.com,
benjamin.gaignard@collabora.com, hverkuil-cisco@xs4all.nl,
Adam Ford <aford173@gmail.com>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
Philipp Zabel <p.zabel@pengutronix.de>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Lucas Stach <l.stach@pengutronix.de>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev
Subject: [PATCH V2 04/10] dt-bindings: media: nxp, imx8mq-vpu: Split G1 and G2 nodes
Date: Thu, 16 Dec 2021 05:12:49 -0600 [thread overview]
Message-ID: <20211216111256.2362683-5-aford173@gmail.com> (raw)
In-Reply-To: <20211216111256.2362683-1-aford173@gmail.com>
The G1 and G2 are separate decoder blocks that are enabled by the
vpu-blk-ctrl power-domain controller, which now has a proper driver.
Update the bindings to support separate nodes for the G1 and G2
decoders with vpu-blk-ctrl power-domain support.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
index 762be3f96ce9..c1e157251de7 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
@@ -15,33 +15,20 @@ description:
properties:
compatible:
- const: nxp,imx8mq-vpu
+ oneOf:
+ - const: nxp,imx8mq-vpu
+ deprecated: true
+ - const: nxp,imx8mq-vpu-g1
+ - const: nxp,imx8mq-vpu-g2
reg:
- maxItems: 3
-
- reg-names:
- items:
- - const: g1
- - const: g2
- - const: ctrl
+ maxItems: 1
interrupts:
- maxItems: 2
-
- interrupt-names:
- items:
- - const: g1
- - const: g2
+ maxItems: 1
clocks:
- maxItems: 3
-
- clock-names:
- items:
- - const: g1
- - const: g2
- - const: bus
+ maxItems: 1
power-domains:
maxItems: 1
@@ -49,31 +36,33 @@ properties:
required:
- compatible
- reg
- - reg-names
- interrupts
- - interrupt-names
- clocks
- - clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
+ #include <dt-bindings/power/imx8mq-power.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ vpu_g1: video-codec@38300000 {
+ compatible = "nxp,imx8mq-vpu-g1";
+ reg = <0x38300000 0x10000>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
+ power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
+ };
+ - |
+ #include <dt-bindings/clock/imx8mq-clock.h>
+ #include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
- vpu: video-codec@38300000 {
- compatible = "nxp,imx8mq-vpu";
- reg = <0x38300000 0x10000>,
- <0x38310000 0x10000>,
- <0x38320000 0x10000>;
- reg-names = "g1", "g2", "ctrl";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "g1", "g2";
- clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
- <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
- <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
- clock-names = "g1", "g2", "bus";
- power-domains = <&pgc_vpu>;
+ vpu_g2: video-codec@38300000 {
+ compatible = "nxp,imx8mq-vpu-g2";
+ reg = <0x38310000 0x10000>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
+ power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
};
--
2.32.0
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next prev parent reply other threads:[~2021-12-16 11:15 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 11:12 [PATCH V2 00/10] media: hantro: imx8mq/imx8mm: Let VPU decoders get controlled by vpu-blk-ctrl Adam Ford
2021-12-16 11:12 ` [PATCH V2 01/10] dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains Adam Ford
2021-12-16 21:04 ` Rob Herring
2021-12-16 11:12 ` [PATCH V2 02/10] dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl Adam Ford
2021-12-16 21:05 ` Rob Herring
2021-12-16 11:12 ` [PATCH V2 03/10] soc: imx: imx8m-blk-ctrl: add " Adam Ford
2021-12-16 11:12 ` Adam Ford [this message]
2021-12-16 13:53 ` [PATCH V2 04/10] dt-bindings: media: nxp, imx8mq-vpu: Split G1 and G2 nodes Rob Herring
2021-12-16 17:29 ` [PATCH V2 04/10] dt-bindings: media: nxp,imx8mq-vpu: " Rob Herring
2021-12-16 11:12 ` [PATCH V2 05/10] media: hantro: Allow i.MX8MQ G1 and G2 to run independently Adam Ford
2021-12-16 12:09 ` Ezequiel Garcia
2021-12-16 11:12 ` [PATCH V2 06/10] arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl Adam Ford
2021-12-16 11:12 ` [PATCH V2 07/10] arm64: dts: imx8mm: Fix VPU Hanging Adam Ford
2021-12-16 11:12 ` [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 and G2 on imx8mm Adam Ford
2021-12-16 21:07 ` Rob Herring
2021-12-16 21:21 ` Adam Ford
2021-12-16 23:03 ` Ezequiel Garcia
2021-12-16 11:12 ` [PATCH V2 09/10] media: hantro: Add support for i.MX8MM Adam Ford
2021-12-16 11:12 ` [PATCH V2 10/10] arm64: dts: imx8mm: Enable Hantro G1 and G2 video decoders Adam Ford
2021-12-16 12:35 ` [PATCH V2 00/10] media: hantro: imx8mq/imx8mm: Let VPU decoders get controlled by vpu-blk-ctrl Ezequiel Garcia
2021-12-16 13:09 ` Adam Ford
2021-12-16 14:58 ` Benjamin Gaignard
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