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From: Brian Norris <briannorris@chromium.org>
To: MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Heiko Stuebner <heiko@sntech.de>
Cc: linux-kernel@vger.kernel.org,
	Elaine Zhang <zhangqing@rock-chips.com>,
	linux-pm@vger.kernel.org, Doug Anderson <dianders@chromium.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	Brian Norris <briannorris@chromium.org>
Subject: [RFC PATCH 2/2] PM / devfreq: rk3399_dmc: Block PMU during transitions
Date: Tue,  5 Apr 2022 18:48:42 -0700	[thread overview]
Message-ID: <20220405184816.RFC.2.I2d73b403944f0b8b5871a77585b73f31ccc62999@changeid> (raw)
In-Reply-To: <20220406014842.2771799-1-briannorris@chromium.org>

See the previous patch ("soc: rockchip: power-domain: Manage resource
conflicts with firmware") for a thorough explanation of the conflicts.
While ARM Trusted Firmware may be modifying memory controller and
power-domain states, we need to block the kernel's power-domain driver.

If the power-domain driver is disabled, there is no resource conflict
and this becomes a no-op.

Signed-off-by: Brian Norris <briannorris@chromium.org>
---

 drivers/devfreq/rk3399_dmc.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index e494d1497d60..daff40702615 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c
@@ -21,6 +21,7 @@
 #include <linux/rwsem.h>
 #include <linux/suspend.h>
 
+#include <soc/rockchip/pm_domains.h>
 #include <soc/rockchip/rk3399_grf.h>
 #include <soc/rockchip/rockchip_sip.h>
 
@@ -93,6 +94,16 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
 
 	mutex_lock(&dmcfreq->lock);
 
+	/*
+	 * Ensure power-domain transitions don't interfere with ARM Trusted
+	 * Firmware power-domain idling.
+	 */
+	err = rockchip_pmu_block();
+	if (err) {
+		dev_err(dev, "Failed to block PMU: %d\n", err);
+		goto out_unlock;
+	}
+
 	/*
 	 * Some idle parameters may be based on the DDR controller clock, which
 	 * is half of the DDR frequency.
@@ -198,6 +209,8 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
 	dmcfreq->volt = target_volt;
 
 out:
+	rockchip_pmu_unblock();
+out_unlock:
 	mutex_unlock(&dmcfreq->lock);
 	return err;
 }
-- 
2.35.1.1094.g7c7d902a7c-goog


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  parent reply	other threads:[~2022-04-06  1:49 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-06  1:48 [RFC PATCH 0/2] rockchip / devfreq: Coordinate DRAM controller resources between ATF and kernel Brian Norris
2022-04-06  1:48 ` [RFC PATCH 1/2] soc: rockchip: power-domain: Manage resource conflicts with firmware Brian Norris
2022-04-06  2:26   ` Doug Anderson
2022-04-07  5:04   ` Chanwoo Choi
2022-04-09  3:34     ` Brian Norris
2022-04-12 16:01       ` Peter Geis
2022-04-13 22:14       ` Chanwoo Choi
2022-05-08 15:05   ` Heiko Stuebner
2022-04-06  1:48 ` Brian Norris [this message]
2022-04-06  2:26   ` [RFC PATCH 2/2] PM / devfreq: rk3399_dmc: Block PMU during transitions Doug Anderson
2022-04-13 22:14   ` Chanwoo Choi
2022-04-13 22:45     ` Heiko Stübner
2022-04-13 23:13       ` Chanwoo Choi
2022-05-07 14:21         ` Chanwoo Choi
2022-05-08 15:07           ` Heiko Stuebner
2022-05-08 18:42             ` Chanwoo Choi
2022-05-08 18:40 ` [RFC PATCH 0/2] rockchip / devfreq: Coordinate DRAM controller resources between ATF and kernel Chanwoo Choi

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