* [PATCH 0/6] Add Support for RK3588s Indiedroid Nova
@ 2023-05-23 21:38 Chris Morgan
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
` (5 more replies)
0 siblings, 6 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add support for the RK3588s based Indiedroid Nova. Note that this
series is dependent on regulator support for the RK806 being
upstreamed.
https://lore.kernel.org/linux-rockchip/20230515152044.GT10825@google.com/
Chris Morgan (6):
ASoC: es8328: Enabling support for 12Mhz sysclk
arm64: dts: rockchip: add default pinctrl for rk3588 emmc
arm64: dts: rockchip: Add sdio node to rk3588
dt-bindings: vendor-prefixes: add Indiedroid
dt-bindings: arm: rockchip: Add Indiedroid Nova
arm64: dts: rockchip: Add Indiedroid Nova board
.../devicetree/bindings/arm/rockchip.yaml | 5 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3588s-indiedroid-nova.dts | 761 ++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 18 +
sound/soc/codecs/es8328.c | 17 +
6 files changed, 804 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
--
2.34.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
2023-05-23 21:51 ` Mark Brown
2023-05-24 11:57 ` Mark Brown
2023-05-23 21:38 ` [PATCH 2/6] arm64: dts: rockchip: add default pinctrl for rk3588 emmc Chris Morgan
` (4 subsequent siblings)
5 siblings, 2 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Enable support for 12Mhz sysclk on es8328. This sysclk value is used on
the Indiedroid Nova rk3588s based single board computer.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
sound/soc/codecs/es8328.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c
index 160adc706cc6..3918be5fc3f1 100644
--- a/sound/soc/codecs/es8328.c
+++ b/sound/soc/codecs/es8328.c
@@ -36,6 +36,16 @@ static const struct snd_pcm_hw_constraint_list constraints_12288 = {
.list = rates_12288,
};
+static unsigned int ratios_12000[] = {
+ 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
+ 48000, 88235, 96000,
+};
+
+static struct snd_pcm_hw_constraint_list constraints_12000 = {
+ .count = ARRAY_SIZE(ratios_12000),
+ .list = ratios_12000,
+};
+
static const unsigned int rates_11289[] = {
8018, 11025, 22050, 44100, 88200,
};
@@ -577,6 +587,13 @@ static int es8328_set_sysclk(struct snd_soc_dai *codec_dai,
es8328->sysclk_constraints = &constraints_12288;
es8328->mclk_ratios = ratios_12288;
break;
+ case 24000000:
+ mclkdiv2 = 1;
+ fallthrough;
+ case 12000000:
+ es8328->sysclk_constraints = &constraints_12000;
+ es8328->mclk_ratios = ratios_12000;
+ break;
default:
return -EINVAL;
}
--
2.34.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/6] arm64: dts: rockchip: add default pinctrl for rk3588 emmc
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
2023-05-23 21:38 ` [PATCH 3/6] arm64: dts: rockchip: Add sdio node to rk3588 Chris Morgan
` (3 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add a default pinctrl definition for the rk3588.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 657c019d27fa..571cdec24a66 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1187,6 +1187,9 @@ sdhci: mmc@fe2e0000 {
<&cru TMCLK_EMMC>;
clock-names = "core", "bus", "axi", "block", "timer";
max-frequency = <200000000>;
+ pinctrl-0 = <&emmc_rstnout>, <&emmc_bus8>, <&emmc_clk>,
+ <&emmc_cmd>, <&emmc_data_strobe>;
+ pinctrl-names = "default";
resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
<&cru SRST_T_EMMC>;
--
2.34.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/6] arm64: dts: rockchip: Add sdio node to rk3588
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
2023-05-23 21:38 ` [PATCH 2/6] arm64: dts: rockchip: add default pinctrl for rk3588 emmc Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
2023-05-23 21:38 ` [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid Chris Morgan
` (2 subsequent siblings)
5 siblings, 0 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add SDIO node for rk3588/rk3588s.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 571cdec24a66..6335d5648bc3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1176,6 +1176,21 @@ sdmmc: mmc@fe2c0000 {
status = "disabled";
};
+ sdio: mmc@fe2d0000 {
+ compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x00 0xfe2d0000 0x00 0x4000>;
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru HCLK_SDIO>, <&cru CCLK_SRC_SDIO>,
+ <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ fifo-depth = <0x100>;
+ max-frequency = <200000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdiom1_pins>;
+ power-domains = <&power RK3588_PD_SDIO>;
+ status = "disabled";
+ };
+
sdhci: mmc@fe2e0000 {
compatible = "rockchip,rk3588-dwcmshc";
reg = <0x0 0xfe2e0000 0x0 0x10000>;
--
2.34.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
` (2 preceding siblings ...)
2023-05-23 21:38 ` [PATCH 3/6] arm64: dts: rockchip: Add sdio node to rk3588 Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
2023-05-24 20:30 ` Conor Dooley
2023-05-23 21:38 ` [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova Chris Morgan
2023-05-23 21:38 ` [PATCH 6/6] arm64: dts: rockchip: Add Indiedroid Nova board Chris Morgan
5 siblings, 1 reply; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Indiedroid is a sub-brand of Ameridroid for their line of single board
computers.
https://indiedroid.us/
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 82d39ab0231b..632662be6e65 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -655,6 +655,8 @@ patternProperties:
description: Iron Device Corporation
"^isee,.*":
description: ISEE 2007 S.L.
+ "^indiedroid,.*":
+ description: Indiedroid
"^isil,.*":
description: Intersil
"^issi,.*":
--
2.34.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
` (3 preceding siblings ...)
2023-05-23 21:38 ` [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
2023-05-24 20:27 ` Conor Dooley
2023-05-23 21:38 ` [PATCH 6/6] arm64: dts: rockchip: Add Indiedroid Nova board Chris Morgan
5 siblings, 1 reply; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add Indiedroid Nova, an rk3588s based single board computer.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index ec141c937b8b..3c5a204bcd81 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -542,6 +542,11 @@ properties:
- khadas,edge-v
- const: rockchip,rk3399
+ - description: Indiedroid Nova SBC
+ items:
+ - const: indiedroid,nova
+ - const: rockchip,rk3588s
+
- description: Khadas Edge2 series boards
items:
- const: khadas,edge2
--
2.34.1
_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 6/6] arm64: dts: rockchip: Add Indiedroid Nova board
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
` (4 preceding siblings ...)
2023-05-23 21:38 ` [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova Chris Morgan
@ 2023-05-23 21:38 ` Chris Morgan
5 siblings, 0 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-23 21:38 UTC (permalink / raw)
To: linux-rockchip
Cc: alsa-devel, devicetree, zyw, sebastian.reichel, andyshrk, jagan,
broonie, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The Indiedroid Nova is an SBC from a sub-brand of Ameridroid that
includes the following hardware:
- A 40-pin GPIO header
- 2 USB-A 3.0 ports
- 2 USB-A 2.0 ports
- A USB-C 2.0 OTG port (used for USB power delivery)
- A USB-C 3.0 port that can do display port output.
- A Micro HDMI 2.1 port.
- A 1GB ethernet port.
- An RT8821CS based WiFi/Bluetooth module.
- A user replaceable eMMC module.
- An SDMMC card slot.
- A MIPI DSI connector.
- A MIPI CSI connector.
- A 3.5mm TRRS audio jack with microphone input.
- An 2 pin socket for an RTC battery.
- A 4 pin socket for a debug port.
- A power button (connected to PMIC), a reset button (connected to SoC
reset), a boot button, and a recovery button (both connected to the
ADC).
- 4GB, 8GB, or 16GB of system RAM.
This initial devicetree includes support for the WiFi, bluetooth,
analog audio out/in, SDMMC, eMMC, RTC, UART debugging, and has
the regulator values from the schematics. ADC, graphics output, GPU,
USB, and wired ethernet are still pending additional upstream changes.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../dts/rockchip/rk3588s-indiedroid-nova.dts | 761 ++++++++++++++++++
2 files changed, 762 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 2d585bbb8f3a..99f11db8158d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -94,5 +94,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
new file mode 100644
index 000000000000..b7070dd970e6
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts
@@ -0,0 +1,761 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/usb/pd.h>
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Indiedroid Nova";
+ compatible = "indiedroid,nova", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio;
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clock-names = "ext_clock";
+ clocks = <&rtc_hym8563>;
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
+ };
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "rockchip,es8388-codec";
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+ routing = "LINPUT2", "Mic Jack",
+ "Headphones", "LOUT1",
+ "Headphones", "ROUT1";
+ dais = <&i2s0_8ch_p0>;
+ };
+
+ vbus5v0_typec: vbus5v0-typec {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&typec5v_pwren>;
+ pinctrl-names = "default";
+ regulator-name = "vbus5v0_typec";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "vcc_1v1_nldo_s3";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ /* Regulator is enabled whenever vcc_1v8_s0 is above 1.6v */
+ vcc_3v3_s0: vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s0";
+ vin-supply = <&vcc_3v3_s3>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "vcc5v0_sys";
+ };
+
+ vcc5v0_usb: vcc5v0-usb {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "vcc5v0_usb";
+ vin-supply = <&vcc5v0_usbdcin>;
+ };
+
+ vcc5v0_usbdcin: vcc5v0-usbdcin {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "vcc5v0_usbdcin";
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_b0{
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1{
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2{
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3{
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+/*
+ * Add labels for each GPIO pin exposed on the 40 pin header. Note that
+ * voltage of each GPIO pin could be either 3.3v or 1.8v (as noted by
+ * label).
+ */
+&gpio0 {
+ gpio-line-names = /* GPIO0 A0-A7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO0 B0-B7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO0 C0-C7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO0 D0-D7 */
+ "HEADER_12_1v8", "", "", "HEADER_24_1v8",
+ "", "", "", "";
+};
+
+&gpio1 {
+ gpio-line-names = /* GPIO1 A0-A7 */
+ "HEADER_27_3v3", "HEADER_28_3v3", "", "",
+ "HEADER_29_1v8", "", "HEADER_7_1v8", "",
+ /* GPIO1 B0-B7 */
+ "", "HEADER_31_1v8", "HEADER_33_1v8", "",
+ "HEADER_11_1v8", "HEADER_13_1v8", "", "",
+ /* GPIO1 C0-C7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO1 D0-D7 */
+ "", "", "", "",
+ "", "", "HEADER_5_3v3", "HEADER_3_3v3";
+};
+
+&gpio3 {
+ gpio-line-names = /* GPIO3 A0-A7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO3 B0-B7 */
+ "HEADER_16_1v8", "HEADER_18_1v8", "", "",
+ "", "", "", "HEADER_19_1v8",
+ /* GPIO3 C0-C7 */
+ "HEADER_21_1v8", "HEADER_23_1v8", "", "HEADER_26_1v8",
+ "HEADER_15_1v8", "HEADER_22_1v8", "", "",
+ /* GPIO3 D0-D7 */
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names = /* GPIO4 A0-A7 */
+ "", "", "HEADER_37_3v3", "HEADER_32_3v3",
+ "HEADER_36_3v3", "", "HEADER_35_3v3", "HEADER_38_3v3",
+ /* GPIO4 B0-B7 */
+ "", "", "", "HEADER_40_3v3",
+ "HEADER_8_3v3", "HEADER_10_3v3", "", "",
+ /* GPIO4 C0-C7 */
+ "", "", "", "",
+ "", "", "", "",
+ /* GPIO4 D0-D7 */
+ "", "", "", "",
+ "", "", "", "";
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0m2_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1050000>;
+ regulator-min-microvolt = <550000>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1050000>;
+ regulator-min-microvolt = <550000>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <550000>;
+ regulator-name = "vdd_npu_s0";
+ regulator-ramp-delay = <2300>;
+ fcs,suspend-voltage-selector = <1>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ pinctrl-0 = <&i2c6m3_xfer>;
+ status = "okay";
+
+ fusb302: typec-portc@22 {
+ compatible = "fcs,fusb302";
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&usbc0_int>;
+ pinctrl-names = "default";
+ vbus-supply = <&vbus5v0_typec>;
+
+ connector {
+ compatible = "usb-c-connector";
+ data-role = "dual";
+ label = "USB-C";
+ power-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
+ op-sink-microwatt = <1000000>;
+ };
+ };
+
+ rtc_hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&hym8563_int>;
+ pinctrl-names = "default";
+ wakeup-source;
+ };
+};
+
+&i2c7 {
+ pinctrl-0 = <&i2c7m0_xfer>;
+ status = "okay";
+
+ es8388: audio-codec@11 {
+ compatible = "everest,es8388";
+ reg = <0x11>;
+ AVDD-supply = <&vcc_3v3_s3>;
+ clock-names = "mclk";
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ DVDD-supply = <&vcc_1v8_s3>;
+ HPVDD-supply = <&vcc_3v3_s3>;
+ PVDD-supply = <&vcc_1v8_s3>;
+ #sound-dai-cells = <0>;
+
+ port {
+ es8388_p0_0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0_0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+
+ i2s0_8ch_p0: port {
+ i2s0_8ch_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8388_p0_0>;
+ };
+ };
+};
+
+
+&pinctrl {
+ bluetooth-pins {
+ bt_reset: bt-reset {
+ rockchip,pins =
+ <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_dev: bt-wake-dev {
+ rockchip,pins =
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_host: bt-wake-host {
+ rockchip,pins =
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ hym8563 {
+
+ hym8563_int: hym8563-int {
+ rockchip,pins =
+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb-typec {
+ usbc0_int: usbc0-int {
+ rockchip,pins =
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ typec5v_pwren: typec5v-pwren {
+ rockchip,pins =
+ <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+/* HS400 modes seemed to cause io errors. */
+&sdhci {
+ bus-width = <8>;
+ no-mmc-hs400;
+ no-sd;
+ no-sdio;
+ non-removable;
+ max-frequency = <200000000>;
+ vmmc-supply = <&vcc_3v3_s0>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ status = "okay";
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency = <100000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <200000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s3>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ #address-cells = <1>;
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ pinctrl-0 = <&spi2m2_pins>, <&spi2m2_cs0>;
+ pinctrl-names = "default";
+ #size-cells = <0>;
+ status = "okay";
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ pinctrl-names = "default";
+ spi-max-frequency = <1000000>;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-enable-ramp-delay = <400>;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <550000>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <550000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <750000>;
+ regulator-min-microvolt = <675000>;
+ regulator-name = "vdd_logic_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <550000>;
+ regulator-name = "vdd_vdenc_s0";
+ regulator-ramp-delay = <12500>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <850000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "vdd2_ddr_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <2000000>;
+ regulator-min-microvolt = <2000000>;
+ regulator-name = "vdd_2v0_pldo_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <600000>;
+ regulator-min-microvolt = <600000>;
+ regulator-name = "vddq_ddr_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1200000>;
+ regulator-min-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vccio_sd_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3_pldo6: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3_pldo6";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <750000>;
+ regulator-min-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <850000>;
+ regulator-min-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <750000>;
+ regulator-min-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ /* Schematics show not in use */
+ nldo-reg5 {
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+/* DMA seems to interfere with bluetooth device normal operation. */
+&uart9 {
+ pinctrl-0 = <&uart9m2_xfer>, <&uart9m2_ctsn>, <&uart9m2_rtsn>;
+ pinctrl-names = "default";
+ /delete-property/ dma-names;
+ /delete-property/ dmas;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8821cs-bt",
+ "realtek,rtl8723bs-bt";
+ device-wake-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&bt_reset>, <&bt_wake_dev>, <&bt_wake_host>;
+ pinctrl-names = "default";
+ };
+};
--
2.34.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
@ 2023-05-23 21:51 ` Mark Brown
2023-05-24 11:57 ` Mark Brown
1 sibling, 0 replies; 14+ messages in thread
From: Mark Brown @ 2023-05-23 21:51 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
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On Tue, May 23, 2023 at 04:38:20PM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Enable support for 12Mhz sysclk on es8328. This sysclk value is used on
> the Indiedroid Nova rk3588s based single board computer.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
If you're sending the patch your signoff should be last in the list.
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_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
2023-05-23 21:51 ` Mark Brown
@ 2023-05-24 11:57 ` Mark Brown
2023-05-24 16:12 ` Chris Morgan
1 sibling, 1 reply; 14+ messages in thread
From: Mark Brown @ 2023-05-24 11:57 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
[-- Attachment #1.1: Type: text/plain, Size: 691 bytes --]
On Tue, May 23, 2023 at 04:38:20PM -0500, Chris Morgan wrote:
> +static unsigned int ratios_12000[] = {
> + 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
> + 48000, 88235, 96000,
> +};
> +
> +static struct snd_pcm_hw_constraint_list constraints_12000 = {
> + .count = ARRAY_SIZE(ratios_12000),
> + .list = ratios_12000,
> +};
...
> + case 12000000:
> + es8328->sysclk_constraints = &constraints_12000;
> + es8328->mclk_ratios = ratios_12000;
The other constraints have separate rates and ratios, with wildly
different values between the two - the ratio (I'm guessing a clock
divider) being written to a 5 bit field which obviously can't contain
the actual sample rate.
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_______________________________________________
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Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk
2023-05-24 11:57 ` Mark Brown
@ 2023-05-24 16:12 ` Chris Morgan
2023-05-24 16:44 ` Mark Brown
0 siblings, 1 reply; 14+ messages in thread
From: Chris Morgan @ 2023-05-24 16:12 UTC (permalink / raw)
To: Mark Brown
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
On Wed, May 24, 2023 at 12:57:02PM +0100, Mark Brown wrote:
> On Tue, May 23, 2023 at 04:38:20PM -0500, Chris Morgan wrote:
>
> > +static unsigned int ratios_12000[] = {
> > + 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
> > + 48000, 88235, 96000,
> > +};
> > +
> > +static struct snd_pcm_hw_constraint_list constraints_12000 = {
> > + .count = ARRAY_SIZE(ratios_12000),
> > + .list = ratios_12000,
> > +};
>
> ...
>
> > + case 12000000:
> > + es8328->sysclk_constraints = &constraints_12000;
> > + es8328->mclk_ratios = ratios_12000;
>
> The other constraints have separate rates and ratios, with wildly
> different values between the two - the ratio (I'm guessing a clock
> divider) being written to a 5 bit field which obviously can't contain
> the actual sample rate.
A bit over my head here, I saw this patch from the Rockchip BSP kernel
branch and tested it on my mainline kernel. Long story short the clock
for the mclk is 12000000. I see that there are similar issues for the
ES8316 on the Rock 5B, so I will probably just wait for a proper fix
there and then implement something similar here.
Thank you.
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk
2023-05-24 16:12 ` Chris Morgan
@ 2023-05-24 16:44 ` Mark Brown
0 siblings, 0 replies; 14+ messages in thread
From: Mark Brown @ 2023-05-24 16:44 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, perex, tiwai, lgirdwood, heiko, conor+dt,
krzysztof.kozlowski+dt, robh+dt, Chris Morgan
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On Wed, May 24, 2023 at 11:12:49AM -0500, Chris Morgan wrote:
> On Wed, May 24, 2023 at 12:57:02PM +0100, Mark Brown wrote:
> > The other constraints have separate rates and ratios, with wildly
> > different values between the two - the ratio (I'm guessing a clock
> > divider) being written to a 5 bit field which obviously can't contain
> > the actual sample rate.
> A bit over my head here, I saw this patch from the Rockchip BSP kernel
> branch and tested it on my mainline kernel. Long story short the clock
> for the mclk is 12000000. I see that there are similar issues for the
> ES8316 on the Rock 5B, so I will probably just wait for a proper fix
> there and then implement something similar here.
It sounded from the rest of the series like you don't actually want to
run at 12MHz anyway, you want a change which deconfigures the sysclk
when the card is idle - that'd allow it to be reconfigured as needed to
support the widest possible set of rates. That'd be work in the generic
cards.
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova
2023-05-23 21:38 ` [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova Chris Morgan
@ 2023-05-24 20:27 ` Conor Dooley
0 siblings, 0 replies; 14+ messages in thread
From: Conor Dooley @ 2023-05-24 20:27 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, broonie, perex, tiwai, lgirdwood, heiko,
conor+dt, krzysztof.kozlowski+dt, robh+dt, Chris Morgan
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On Tue, May 23, 2023 at 04:38:24PM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add Indiedroid Nova, an rk3588s based single board computer.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid
2023-05-23 21:38 ` [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid Chris Morgan
@ 2023-05-24 20:30 ` Conor Dooley
2023-05-25 13:57 ` Chris Morgan
0 siblings, 1 reply; 14+ messages in thread
From: Conor Dooley @ 2023-05-24 20:30 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, broonie, perex, tiwai, lgirdwood, heiko,
conor+dt, krzysztof.kozlowski+dt, robh+dt, Chris Morgan
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On Tue, May 23, 2023 at 04:38:23PM -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Indiedroid is a sub-brand of Ameridroid for their line of single board
> computers.
> https://indiedroid.us/
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index 82d39ab0231b..632662be6e65 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -655,6 +655,8 @@ patternProperties:
> description: Iron Device Corporation
> "^isee,.*":
> description: ISEE 2007 S.L.
> + "^indiedroid,.*":
> + description: Indiedroid
Can you add this in alphabetical order please?
Thanks,
Conor.
> "^isil,.*":
> description: Intersil
> "^issi,.*":
> --
> 2.34.1
>
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^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid
2023-05-24 20:30 ` Conor Dooley
@ 2023-05-25 13:57 ` Chris Morgan
0 siblings, 0 replies; 14+ messages in thread
From: Chris Morgan @ 2023-05-25 13:57 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-rockchip, alsa-devel, devicetree, zyw, sebastian.reichel,
andyshrk, jagan, broonie, perex, tiwai, lgirdwood, heiko,
conor+dt, krzysztof.kozlowski+dt, robh+dt, Chris Morgan
On Wed, May 24, 2023 at 09:30:03PM +0100, Conor Dooley wrote:
> On Tue, May 23, 2023 at 04:38:23PM -0500, Chris Morgan wrote:
> > From: Chris Morgan <macromorgan@hotmail.com>
> >
> > Indiedroid is a sub-brand of Ameridroid for their line of single board
> > computers.
> > https://indiedroid.us/
> >
> > Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> > ---
> > Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > index 82d39ab0231b..632662be6e65 100644
> > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > @@ -655,6 +655,8 @@ patternProperties:
> > description: Iron Device Corporation
> > "^isee,.*":
> > description: ISEE 2007 S.L.
> > + "^indiedroid,.*":
> > + description: Indiedroid
>
> Can you add this in alphabetical order please?
D'oh. Simple mistake, sorry. I'll fix it in V2.
Thank you.
>
> Thanks,
> Conor.
>
> > "^isil,.*":
> > description: Intersil
> > "^issi,.*":
> > --
> > 2.34.1
> >
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http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-05-25 13:57 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-23 21:38 [PATCH 0/6] Add Support for RK3588s Indiedroid Nova Chris Morgan
2023-05-23 21:38 ` [PATCH 1/6] ASoC: es8328: Enabling support for 12Mhz sysclk Chris Morgan
2023-05-23 21:51 ` Mark Brown
2023-05-24 11:57 ` Mark Brown
2023-05-24 16:12 ` Chris Morgan
2023-05-24 16:44 ` Mark Brown
2023-05-23 21:38 ` [PATCH 2/6] arm64: dts: rockchip: add default pinctrl for rk3588 emmc Chris Morgan
2023-05-23 21:38 ` [PATCH 3/6] arm64: dts: rockchip: Add sdio node to rk3588 Chris Morgan
2023-05-23 21:38 ` [PATCH 4/6] dt-bindings: vendor-prefixes: add Indiedroid Chris Morgan
2023-05-24 20:30 ` Conor Dooley
2023-05-25 13:57 ` Chris Morgan
2023-05-23 21:38 ` [PATCH 5/6] dt-bindings: arm: rockchip: Add Indiedroid Nova Chris Morgan
2023-05-24 20:27 ` Conor Dooley
2023-05-23 21:38 ` [PATCH 6/6] arm64: dts: rockchip: Add Indiedroid Nova board Chris Morgan
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