[Patch V2]; MIPS: simplify copy_user_high_page for MIPS64 w/o cache alias

[Patch V2]; MIPS: simplify copy_user_high_page for MIPS64 w/o cache alias

[Huang Pei]

V2:

reindent the code 

[PATCH] MIPS: simplify copy_user_high_page for MIPS64 w/o cache alias

[Huang Pei]

Borrow from ARM64

MIPS64 CPU has enough direct mapped memory space to access all
physical memory. In case of no cache alias, bypass both kmap_atomic
and kmap_coherent for better real-time performance.

Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
 arch/mips/mm/init.c | 37 +++++++++++++++++++++++++------------
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 19347dc6bbf8..d9923fd9ed3b 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -171,21 +171,34 @@ void copy_user_highpage(struct page *to, struct page *from,
 {
 	void *vfrom, *vto;
 
-	vto = kmap_atomic(to);
-	if (cpu_has_dc_aliases &&
-	    page_mapcount(from) && !Page_dcache_dirty(from)) {
-		vfrom = kmap_coherent(from, vaddr);
+	if (IS_ENABLED(CONFIG_64BIT) && !cpu_has_dc_aliases) {
+		vfrom = page_address(from);
+		vto   = page_address(to);
 		copy_page(vto, vfrom);
-		kunmap_coherent();
+		/*
+		 * even without cache alias, still need to maintain
+		 * coherence between icache and dcache
+		 */
+		if (!cpu_has_ic_fills_f_dc)
+			flush_data_cache_page((unsigned long)vto);
+
 	} else {
-		vfrom = kmap_atomic(from);
-		copy_page(vto, vfrom);
-		kunmap_atomic(vfrom);
+		vto = kmap_atomic(to);
+		if (cpu_has_dc_aliases &&
+		    page_mapcount(from) && !Page_dcache_dirty(from)) {
+			vfrom = kmap_coherent(from, vaddr);
+			copy_page(vto, vfrom);
+			kunmap_coherent();
+		} else {
+			vfrom = kmap_atomic(from);
+			copy_page(vto, vfrom);
+			kunmap_atomic(vfrom);
+		}
+		if ((!cpu_has_ic_fills_f_dc) ||
+		      pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+			flush_data_cache_page((unsigned long)vto);
+		kunmap_atomic(vto);
 	}
-	if ((!cpu_has_ic_fills_f_dc) ||
-	    pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
-		flush_data_cache_page((unsigned long)vto);
-	kunmap_atomic(vto);
 	/* Make sure this page is cleared on other CPU's too before using it */
 	smp_wmb();
 }
-- 
2.25.1

Re: [PATCH] MIPS: simplify copy_user_high_page for MIPS64 w/o cache alias

[Thomas Bogendoerfer]

On Sat, Aug 07, 2021 at 04:04:29PM +0800, Huang Pei wrote:
> Borrow from ARM64
> 
> MIPS64 CPU has enough direct mapped memory space to access all
> physical memory. In case of no cache alias, bypass both k*map_atomic
> and k*map_coherent for better real-time performance.
> 
> Signed-off-by: Huang Pei <huangpei@loongson.cn>
> ---
>  arch/mips/mm/init.c | 39 ++++++++++++++++++++++++++-------------
>  1 file changed, 26 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
> index 19347dc6bbf8..1f5bdd18ae7c 100644
> --- a/arch/mips/mm/init.c
> +++ b/arch/mips/mm/init.c
> @@ -171,22 +171,35 @@ void copy_user_highpage(struct page *to, struct page *from,
>  {
>  	void *vfrom, *vto;
>  
> -	vto = kmap_atomic(to);
> -	if (cpu_has_dc_aliases &&
> -	    page_mapcount(from) && !Page_dcache_dirty(from)) {
> -		vfrom = kmap_coherent(from, vaddr);
> +	if (IS_ENABLED(CONFIG_64BIT) && !cpu_has_dc_aliases) {
> +		vfrom = page_address(from);
> +		vto   = page_address(to);
>  		copy_page(vto, vfrom);
> -		kunmap_coherent();
> +		/*
> +		 * even without cache alias, still need to maintain
> +		 * coherence between icache and dcache
> +		 */
> +		if (!cpu_has_ic_fills_f_dc)
> +			flush_data_cache_page((unsigned long)vto);
> +
>  	} else {
> -		vfrom = kmap_atomic(from);
> -		copy_page(vto, vfrom);
> -		kunmap_atomic(vfrom);
> +		vto = kmap_atomic(to);
> +		if (cpu_has_dc_aliases &&
> +				page_mapcount(from) && !Page_dcache_dirty(from)) {

please fix indentation and place page_mapping() to same column as
cpu_has_dc_aliases()

> +			vfrom = kmap_coherent(from, vaddr);
> +			copy_page(vto, vfrom);
> +			kunmap_coherent();
> +		} else {
> +			vfrom = kmap_atomic(from);
> +			copy_page(vto, vfrom);
> +			kunmap_atomic(vfrom);
> +		}
> +		if ((!cpu_has_ic_fills_f_dc) ||
> +				pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))

same here

> +			flush_data_cache_page((unsigned long)vto);
> +		kunmap_atomic(vto);
> +		/* Make sure this page is cleared on other CPU's too before using it */

this comment should stay in front of the smp_wmb()

>  	}
> -	if ((!cpu_has_ic_fills_f_dc) ||
> -	    pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
> -		flush_data_cache_page((unsigned long)vto);
> -	kunmap_atomic(vto);
> -	/* Make sure this page is cleared on other CPU's too before using it */
>  	smp_wmb();

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

[PATCH] MIPS: simplify copy_user_high_page for MIPS64 w/o cache alias

[Huang Pei]

Borrow from ARM64

MIPS64 CPU has enough direct mapped memory space to access all
physical memory. In case of no cache alias, bypass both k*map_atomic
and k*map_coherent for better real-time performance.

Signed-off-by: Huang Pei <huangpei@loongson.cn>
---
 arch/mips/mm/init.c | 39 ++++++++++++++++++++++++++-------------
 1 file changed, 26 insertions(+), 13 deletions(-)

diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 19347dc6bbf8..1f5bdd18ae7c 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -171,22 +171,35 @@ void copy_user_highpage(struct page *to, struct page *from,
 {
 	void *vfrom, *vto;
 
-	vto = kmap_atomic(to);
-	if (cpu_has_dc_aliases &&
-	    page_mapcount(from) && !Page_dcache_dirty(from)) {
-		vfrom = kmap_coherent(from, vaddr);
+	if (IS_ENABLED(CONFIG_64BIT) && !cpu_has_dc_aliases) {
+		vfrom = page_address(from);
+		vto   = page_address(to);
 		copy_page(vto, vfrom);
-		kunmap_coherent();
+		/*
+		 * even without cache alias, still need to maintain
+		 * coherence between icache and dcache
+		 */
+		if (!cpu_has_ic_fills_f_dc)
+			flush_data_cache_page((unsigned long)vto);
+
 	} else {
-		vfrom = kmap_atomic(from);
-		copy_page(vto, vfrom);
-		kunmap_atomic(vfrom);
+		vto = kmap_atomic(to);
+		if (cpu_has_dc_aliases &&
+				page_mapcount(from) && !Page_dcache_dirty(from)) {
+			vfrom = kmap_coherent(from, vaddr);
+			copy_page(vto, vfrom);
+			kunmap_coherent();
+		} else {
+			vfrom = kmap_atomic(from);
+			copy_page(vto, vfrom);
+			kunmap_atomic(vfrom);
+		}
+		if ((!cpu_has_ic_fills_f_dc) ||
+				pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+			flush_data_cache_page((unsigned long)vto);
+		kunmap_atomic(vto);
+		/* Make sure this page is cleared on other CPU's too before using it */
 	}
-	if ((!cpu_has_ic_fills_f_dc) ||
-	    pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
-		flush_data_cache_page((unsigned long)vto);
-	kunmap_atomic(vto);
-	/* Make sure this page is cleared on other CPU's too before using it */
 	smp_wmb();
 }
 
-- 
2.25.1