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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Thomas Bogendoerfer <tbogendoerfer@suse.de>,
	Jakub Kicinski <jakub.kicinski@netronome.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>, Lee Jones <lee.jones@linaro.org>,
	"David S. Miller" <davem@davemloft.net>,
	Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jslaby@suse.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mips@vger.kernel.org, netdev@vger.kernel.org,
	linux-rtc@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v9 5/5] MIPS: SGI-IP27: Enable ethernet phy on second Origin 200 module
Date: Thu, 10 Oct 2019 19:37:15 +0300
Message-ID: <102db20a-0c37-3e28-2d14-e9c6eaa55f5c@cogentembedded.com> (raw)
In-Reply-To: <20191010145953.21327-6-tbogendoerfer@suse.de>

On 10/10/2019 05:59 PM, Thomas Bogendoerfer wrote:

> PROM only enables ethernet PHY on first Origin 200 module, so we must
> do it ourselves for the second module.
> 
> Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
> ---
>  arch/mips/pci/pci-ip27.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
> index 441eb9383b20..7cc784cb299b 100644
> --- a/arch/mips/pci/pci-ip27.c
> +++ b/arch/mips/pci/pci-ip27.c
> @@ -7,6 +7,11 @@
>   * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf@linux-mips.org)
>   * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
>   */
> +#include <asm/sn/addrs.h>
> +#include <asm/sn/types.h>
> +#include <asm/sn/klconfig.h>
> +#include <asm/sn/hub.h>
> +#include <asm/sn/ioc3.h>
>  #include <asm/pci/bridge.h>
>  
>  dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
> @@ -31,3 +36,20 @@ int pcibus_to_node(struct pci_bus *bus)
>  }
>  EXPORT_SYMBOL(pcibus_to_node);
>  #endif /* CONFIG_NUMA */
> +
> +static void ip29_fixup_phy(struct pci_dev *dev)
> +{
> +	int nasid = pcibus_to_node(dev->bus);
> +	u32 sid;
> +
> +	if (nasid != 1)
> +		return; /* only needed on second module */
> +
> +	/* enable ethernet PHY on IP29 systemboard */
> +	pci_read_config_dword(dev, PCI_SUBSYSTEM_VENDOR_ID, &sid);
> +	if (sid == ((PCI_VENDOR_ID_SGI << 16) | IOC3_SUBSYS_IP29_SYSBOARD))

   I thought PCI was little endian, thuis vendor ID at offset 0 and device ID
at offset 2?

[...]

MBR, Sergei

  reply index

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-10 14:59 [PATCH v9 0/5] Use MFD framework for SGI IOC3 drivers Thomas Bogendoerfer
2019-10-10 14:59 ` [PATCH v9 1/5] nvmem: core: add nvmem_device_find Thomas Bogendoerfer
2019-10-10 14:59 ` [PATCH v9 2/5] MIPS: PCI: use information from 1-wire PROM for IOC3 detection Thomas Bogendoerfer
2019-10-10 14:59 ` [PATCH v9 3/5] mfd: ioc3: Add driver for SGI IOC3 chip Thomas Bogendoerfer
2019-10-11  3:00   ` Jakub Kicinski
2019-10-11  8:37     ` Thomas Bogendoerfer
2019-10-10 14:59 ` [PATCH v9 4/5] MIPS: SGI-IP27: fix readb/writeb addressing Thomas Bogendoerfer
2019-10-10 14:59 ` [PATCH v9 5/5] MIPS: SGI-IP27: Enable ethernet phy on second Origin 200 module Thomas Bogendoerfer
2019-10-10 16:37   ` Sergei Shtylyov [this message]
2019-10-11  9:28     ` Thomas Bogendoerfer

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