From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEDB2C04EB8 for ; Mon, 10 Dec 2018 11:52:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B1BCC20821 for ; Mon, 10 Dec 2018 11:52:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=verge.net.au header.i=@verge.net.au header.b="VCp/Y3C3" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B1BCC20821 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=verge.net.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-rtc-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727401AbeLJLwO (ORCPT ); Mon, 10 Dec 2018 06:52:14 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:41274 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726697AbeLJLwO (ORCPT ); Mon, 10 Dec 2018 06:52:14 -0500 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id 7466225BED1; Mon, 10 Dec 2018 22:52:11 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1544442731; bh=0V9Puk/eMsw6/eMFJfME7eoRK+wAFe0fVqxJXe3Seg8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=VCp/Y3C3cBY/kXV3cOIfMbtnydwrurur2hcsv0X/PH4yQFUR2k58JnoDO2Y59w8hs GzhQmd5832J+eI2Z75C7i7+OyNR3RZ9xtS6jjFvR8kHSFVtaQiodGVF8ZqeAladasQ 0BMk82mfGIxM8L+gWiJbmb4FbXipklVu5eOIKL1Q= Received: by reginn.horms.nl (Postfix, from userid 7100) id E0B779402E1; Mon, 10 Dec 2018 12:52:09 +0100 (CET) Date: Mon, 10 Dec 2018 12:52:09 +0100 From: Simon Horman To: Geert Uytterhoeven Cc: Biju Das , Rob Herring , Mark Rutland , Magnus Damm , Alexandre Belloni , linux-rtc@vger.kernel.org, Linux-Renesas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Geert Uytterhoeven , Chris Paterson , Fabrizio Castro Subject: Re: [PATCH v3 4/4] ARM: dts: iwg23s-sbc: Enable RTC Message-ID: <20181210115209.vlhcwni2tkyn3hyv@verge.net.au> References: <1544086559-47141-1-git-send-email-biju.das@bp.renesas.com> <1544086559-47141-5-git-send-email-biju.das@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org On Thu, Dec 06, 2018 at 01:59:58PM +0100, Geert Uytterhoeven wrote: > Hi Biju, > > On Thu, Dec 6, 2018 at 1:41 PM Biju Das wrote: > > > Subject: Re: [PATCH v3 4/4] ARM: dts: iwg23s-sbc: Enable RTC > > > > On Thu, Dec 6, 2018 at 10:04 AM Biju Das wrote: > > > > Enable NXP pcf85263 real time clock for the iWave SBC based on RZ/G1C. > > > > > > > > Signed-off-by: Biju Das > > > > > > Reviewed-by: Geert Uytterhoeven > > > > > > > --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts > > > > +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts > > > > @@ -84,12 +84,30 @@ > > > > clock-frequency = <20000000>; > > > > }; > > > > > > > > +&i2c3 { > > > > + pinctrl-0 = <&i2c3_pins>; > > > > + pinctrl-names = "default"; > > > > + > > > > + status = "okay"; > > > > + clock-frequency = <400000>; > > > > + > > > > + rtc@51 { > > > > + compatible = "nxp,pcf85263"; > > > > + reg = <0x51>; > > > > > > You might want to enable the optional interrupt: > > > > I have enabled this but unfortunately it is generating 100000 of gpio interrupts during boot. > > Oh, the DT bindings claim interrupt support hasn't been implement yet ;-) > > > The reason is, by default this pin is configured as function(Power on reset/at u-boot). > > Currently there is no function available in kernel to convert a pin from function to gpio (Similar to the issue Fab is facing for display hot plug interrupt) > > > > May be we can add optional interrupt at a later stage, once we have a solution for converting pin from function to gpio. > > > > Please share your opinion on this. > > IC. In that case, please postpone describing the interrupt until the issue is > fixed. It feels like this patch is ready to be accepted. Geert, do you concur?