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* [PATCH v1 0/2] rtc: update ds1388 support
@ 2020-02-07  3:18 Chris Packham
  2020-02-07  3:18 ` [PATCH v1 1/2] rtc: ds1307: handle oscillator failure flags for ds1388 variant Chris Packham
  2020-02-07  3:18 ` [PATCH v1 2/2] rtc: ds1307: add support for watchdog timer on ds1388 Chris Packham
  0 siblings, 2 replies; 3+ messages in thread
From: Chris Packham @ 2020-02-07  3:18 UTC (permalink / raw)
  To: a.zummo, alexandre.belloni; +Cc: linux-rtc, linux-kernel, Chris Packham

The ds1388 as a slightly different register layout and watchdog timer
capabilities. Add support for both of these.

Chris Packham (2):
  rtc: ds1307: handle oscillator failure flags for ds1388 variant
  rtc: ds1307: add support for watchdog timer on ds1388

 drivers/rtc/rtc-ds1307.c | 114 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 114 insertions(+)

-- 
2.25.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v1 1/2] rtc: ds1307: handle oscillator failure flags for ds1388 variant
  2020-02-07  3:18 [PATCH v1 0/2] rtc: update ds1388 support Chris Packham
@ 2020-02-07  3:18 ` Chris Packham
  2020-02-07  3:18 ` [PATCH v1 2/2] rtc: ds1307: add support for watchdog timer on ds1388 Chris Packham
  1 sibling, 0 replies; 3+ messages in thread
From: Chris Packham @ 2020-02-07  3:18 UTC (permalink / raw)
  To: a.zummo, alexandre.belloni; +Cc: linux-rtc, linux-kernel, Chris Packham

The FLAG register is at a different location to the other supported RTCs
so this requires an extra case in the existing switch statement.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 drivers/rtc/rtc-ds1307.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 1f7e8aefc1eb..31a38d468378 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -144,6 +144,8 @@ enum ds_type {
 #	define M41TXX_BIT_CALIB_SIGN	BIT(5)
 #	define M41TXX_M_CALIBRATION	GENMASK(4, 0)
 
+#define DS1388_REG_FLAG			0x0b
+#	define DS1388_BIT_OSF		BIT(7)
 /* negative offset step is -2.034ppm */
 #define M41TXX_NEG_OFFSET_STEP_PPB	2034
 /* positive offset step is +4.068ppm */
@@ -252,6 +254,13 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 		if (tmp & DS1340_BIT_OSF)
 			return -EINVAL;
 		break;
+	case ds_1388:
+		ret = regmap_read(ds1307->regmap, DS1388_REG_FLAG, &tmp);
+		if (ret)
+			return ret;
+		if (tmp & DS1388_BIT_OSF)
+			return -EINVAL;
+		break;
 	case mcp794xx:
 		if (!(tmp & MCP794XX_BIT_ST))
 			return -EINVAL;
-- 
2.25.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v1 2/2] rtc: ds1307: add support for watchdog timer on ds1388
  2020-02-07  3:18 [PATCH v1 0/2] rtc: update ds1388 support Chris Packham
  2020-02-07  3:18 ` [PATCH v1 1/2] rtc: ds1307: handle oscillator failure flags for ds1388 variant Chris Packham
@ 2020-02-07  3:18 ` Chris Packham
  1 sibling, 0 replies; 3+ messages in thread
From: Chris Packham @ 2020-02-07  3:18 UTC (permalink / raw)
  To: a.zummo, alexandre.belloni; +Cc: linux-rtc, linux-kernel, Chris Packham

The DS1388 variant has watchdog timer capabilities. When using a DS1388
and having enabled CONFIG_WATCHDOG_CORE register a watchdog device for
the DS1388.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 drivers/rtc/rtc-ds1307.c | 105 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 105 insertions(+)

diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 31a38d468378..e83d9e52aae5 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -22,6 +22,7 @@
 #include <linux/hwmon-sysfs.h>
 #include <linux/clk-provider.h>
 #include <linux/regmap.h>
+#include <linux/watchdog.h>
 
 /*
  * We can't determine type by probing, but if we expect pre-Linux code
@@ -144,8 +145,15 @@ enum ds_type {
 #	define M41TXX_BIT_CALIB_SIGN	BIT(5)
 #	define M41TXX_M_CALIBRATION	GENMASK(4, 0)
 
+#define DS1388_REG_WDOG_HUN_SECS	0x08
+#define DS1388_REG_WDOG_SECS		0x09
 #define DS1388_REG_FLAG			0x0b
+#	define DS1388_BIT_WF		BIT(6)
 #	define DS1388_BIT_OSF		BIT(7)
+#define DS1388_REG_CONTROL		0x0c
+#	define DS1388_BIT_RST		BIT(0)
+#	define DS1388_BIT_WDE		BIT(1)
+
 /* negative offset step is -2.034ppm */
 #define M41TXX_NEG_OFFSET_STEP_PPB	2034
 /* positive offset step is +4.068ppm */
@@ -166,6 +174,9 @@ struct ds1307 {
 #ifdef CONFIG_COMMON_CLK
 	struct clk_hw		clks[2];
 #endif
+#ifdef CONFIG_WATCHDOG_CORE
+	struct watchdog_device	wdt;
+#endif
 };
 
 struct chip_desc {
@@ -854,6 +865,58 @@ static int m41txx_rtc_set_offset(struct device *dev, long offset)
 				  ctrl_reg);
 }
 
+#ifdef CONFIG_WATCHDOG_CORE
+static int ds1388_wdt_start(struct watchdog_device *wdt_dev)
+{
+	struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev);
+	u8 regs[2];
+	int ret;
+
+	ret = regmap_update_bits(ds1307->regmap, DS1388_REG_FLAG,
+			DS1388_BIT_WF, 0);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL,
+				 DS1388_BIT_WDE|DS1388_BIT_RST, 0);
+	if (ret)
+		return ret;
+
+	/*
+	 * watchdog timeouts are measured in seconds so max out hundreths of
+	 * seconds field.
+	 */
+	regs[0] = 0x99;
+	regs[1] = bin2bcd(wdt_dev->timeout);
+
+	ret = regmap_bulk_write(ds1307->regmap, DS1388_REG_WDOG_HUN_SECS, regs,
+			sizeof(regs));
+	if (ret)
+		return ret;
+
+	return regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL,
+				  DS1388_BIT_WDE|DS1388_BIT_RST,
+				  DS1388_BIT_WDE|DS1388_BIT_RST);
+}
+
+static int ds1388_wdt_stop(struct watchdog_device *wdt_dev)
+{
+	struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev);
+
+	return regmap_update_bits(ds1307->regmap, DS1388_REG_CONTROL,
+				  DS1388_BIT_WDE|DS1388_BIT_RST, 0);
+}
+
+static int ds1388_wdt_ping(struct watchdog_device *wdt_dev)
+{
+	struct ds1307 *ds1307 = watchdog_get_drvdata(wdt_dev);
+	u8 regs[2];
+
+	return regmap_bulk_read(ds1307->regmap, DS1388_REG_WDOG_HUN_SECS, regs,
+				sizeof(regs));
+}
+#endif
+
 static const struct rtc_class_ops rx8130_rtc_ops = {
 	.read_time      = ds1307_get_time,
 	.set_time       = ds1307_set_time,
@@ -880,6 +943,20 @@ static const struct rtc_class_ops m41txx_rtc_ops = {
 	.set_offset	= m41txx_rtc_set_offset,
 };
 
+#ifdef CONFIG_WATCHDOG_CORE
+static const struct watchdog_info ds1388_wdt_info = {
+	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
+	.identity = "DS1388 watchdog",
+};
+
+static const struct watchdog_ops ds1388_wdt_ops = {
+	.owner = THIS_MODULE,
+	.start = ds1388_wdt_start,
+	.stop = ds1388_wdt_stop,
+	.ping = ds1388_wdt_ping,
+};
+#endif
+
 static const struct chip_desc chips[last_ds_type] = {
 	[ds_1307] = {
 		.nvram_offset	= 8,
@@ -1576,6 +1653,33 @@ static void ds1307_clks_register(struct ds1307 *ds1307)
 
 #endif /* CONFIG_COMMON_CLK */
 
+#ifdef CONFIG_WATCHDOG_CORE
+static void ds1307_wdt_register(struct ds1307 *ds1307)
+{
+	int ret;
+
+	if (ds1307->type != ds_1388)
+		return;
+
+	ds1307->wdt.info = &ds1388_wdt_info;
+	ds1307->wdt.ops = &ds1388_wdt_ops;
+	ds1307->wdt.max_timeout = 99;
+	ds1307->wdt.min_timeout = 1;
+
+	watchdog_init_timeout(&ds1307->wdt, 99, ds1307->dev);
+	watchdog_set_drvdata(&ds1307->wdt, ds1307);
+	ret = watchdog_register_device(&ds1307->wdt);
+	if (ret) {
+		dev_warn(ds1307->dev, "unable to register watchdog device %d\n",
+			 ret);
+	}
+}
+#else
+static void ds1307_wdt_register(struct ds1307 *ds1307)
+{
+}
+#endif /* CONFIG_WATCHDOG_CORE */
+
 static const struct regmap_config regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 8,
@@ -1865,6 +1969,7 @@ static int ds1307_probe(struct i2c_client *client,
 
 	ds1307_hwmon_register(ds1307);
 	ds1307_clks_register(ds1307);
+	ds1307_wdt_register(ds1307);
 
 	return 0;
 
-- 
2.25.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-02-07  3:18 [PATCH v1 0/2] rtc: update ds1388 support Chris Packham
2020-02-07  3:18 ` [PATCH v1 1/2] rtc: ds1307: handle oscillator failure flags for ds1388 variant Chris Packham
2020-02-07  3:18 ` [PATCH v1 2/2] rtc: ds1307: add support for watchdog timer on ds1388 Chris Packham

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