From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5F81C43331 for ; Tue, 24 Mar 2020 17:53:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B1CC9206F6 for ; Tue, 24 Mar 2020 17:53:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727382AbgCXRx6 (ORCPT ); Tue, 24 Mar 2020 13:53:58 -0400 Received: from mail.baikalelectronics.com ([87.245.175.226]:43062 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727314AbgCXRx6 (ORCPT ); Tue, 24 Mar 2020 13:53:58 -0400 X-Greylist: delayed 540 seconds by postgrey-1.27 at vger.kernel.org; Tue, 24 Mar 2020 13:53:56 EDT Received: from localhost (unknown [127.0.0.1]) by mail.baikalelectronics.ru (Postfix) with ESMTP id 7FE358030776; Tue, 24 Mar 2020 17:44:50 +0000 (UTC) X-Virus-Scanned: amavisd-new at baikalelectronics.ru Received: from mail.baikalelectronics.ru ([127.0.0.1]) by localhost (mail.baikalelectronics.ru [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 882jLCueSa2y; Tue, 24 Mar 2020 20:44:48 +0300 (MSK) From: CC: Serge Semin , Serge Semin , Alexey Malahov , Maxim Kaurkin , Pavel Parkhomenko , Ramil Zaripov , Ekaterina Skachko , Vadim Vlasov , Thomas Bogendoerfer , Paul Burton , Ralf Baechle , Daniel Lezcano , Thomas Gleixner , Arnd Bergmann , Alessandro Zummo , Alexandre Belloni , Andy Shevchenko , Rob Herring , Mark Rutland , , , Subject: [PATCH v2 0/6] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support Date: Tue, 24 Mar 2020 20:43:19 +0300 Message-ID: <20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru> In-Reply-To: <20200306125622.839ED80307C4@mail.baikalelectronics.ru> References: <20200306125622.839ED80307C4@mail.baikalelectronics.ru> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) To: unlisted-recipients:; (no To-header on input) Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org From: Serge Semin As for all Baikal-T1 SoC related patchsets, which need this, we replaced the DW APB Timer legacy plain text-based dt-binding file with DT schema. Similarly the MIPS GIC bindings file is also converted to DT schema seeing it also defines the MIPS GIC Timer binding. Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a functionality of two another timers: embedded into the MIPS GIC timer and three external DW timers available over APB bus. But we can't use them before the corresponding drivers are properly fixed. First of all DW APB Timer shouldn't be bound to a single CPU, since as being accessible over APB they are external with respect to all possible CPUs. Secondly there might be more than just two DW APB Timers in the system (Baikal-T1 has three of them), so permit the driver to use one of them as a clocksource and the rest - for clockevents. Thirdly it's possible to use MIPS GIC timer as a clocksource so register it in the corresponding subsystem (the patch has been found in the Paul Burton MIPS repo so I left the original Signed-off-by attribute). Finally in the same way as r4k timer the MIPS GIC timer should be used with care when CPUFREQ config is enabled since in case of CM2 the timer counting depends on the CPU reference clock frequency while the clocksource subsystem currently doesn't support the timers with non-stable clock. This patchset is rebased and tested on the mainline Linux kernel 5.6-rc4: commit 98d54f81e36b ("Linux 5.6-rc4"). Changelog v2: - Fix the SoB tags. - Our corporate email server doesn't change Message-Id anymore, so the patchset is resubmitted being in the cover-letter-threaded format. - Convert the "snps,dw-apb-timer" binding to DT schema in a dedicated patch. - Convert the "mti,gic" binding to DT schema in a dedicated patch. Signed-off-by: Serge Semin Cc: Alexey Malahov Cc: Maxim Kaurkin Cc: Pavel Parkhomenko Cc: Ramil Zaripov Cc: Ekaterina Skachko Cc: Vadim Vlasov Cc: Thomas Bogendoerfer Cc: Paul Burton Cc: Ralf Baechle Cc: Daniel Lezcano Cc: Thomas Gleixner Cc: Arnd Bergmann Cc: Alessandro Zummo Cc: Alexandre Belloni Cc: Andy Shevchenko Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Paul Burton (1): clocksource: mips-gic-timer: Register as sched_clock Serge Semin (5): dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema dt-bindings: interrupt-controller: Convert mti,gic to DT schema clocksource: dw_apb_timer: Set clockevent any-possible-CPU mask clocksource: dw_apb_timer_of: Fix missing clockevent timers clocksource: mips-gic-timer: Set limitations on clocksource/sched-clocks usage .../interrupt-controller/mips-gic.txt | 67 -------- .../interrupt-controller/mti,gic.yaml | 152 ++++++++++++++++++ .../devicetree/bindings/rtc/dw-apb.txt | 32 ---- .../bindings/rtc/snps,dw-apb-timer.yaml | 88 ++++++++++ drivers/clocksource/dw_apb_timer.c | 18 +-- drivers/clocksource/dw_apb_timer_of.c | 9 +- drivers/clocksource/mips-gic-timer.c | 30 +++- include/linux/dw_apb_timer.h | 2 +- 8 files changed, 276 insertions(+), 122 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml delete mode 100644 Documentation/devicetree/bindings/rtc/dw-apb.txt create mode 100644 Documentation/devicetree/bindings/rtc/snps,dw-apb-timer.yaml -- 2.25.1