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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Alessandro Zummo <a.zummo@towertech.it>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Arnd Bergmann <arnd@arndb.de>, Rob Herring <robh+dt@kernel.org>,
	<linux-mips@vger.kernel.org>, <linux-rtc@vger.kernel.org>,
	<devicetree@vger.kernel.org>,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 7/7] clocksource: mips-gic-timer: Set limitations on clocksource/sched-clocks usage
Date: Thu, 7 May 2020 00:41:07 +0300	[thread overview]
Message-ID: <20200506214107.25956-8-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru>

Currently neither clocksource nor scheduler clock kernel framework
support the clocks with variable frequency. Needless to say how many
problems may cause the sudden base clocks frequency change. In a
simplest case the system time will either slow down or speed up.
Since on CM2.5 and earlier MIPS GIC timer is synchronously clocked
with CPU we must set some limitations on using it for these frameworks
if CPU frequency may change. First of all it's not safe to have the
MIPS GIC used for scheduler timings. So we shouldn't proceed with
the clocks registration in the sched-subsystem. Secondly we must
significantly decrease the MIPS GIC clocksource rating. This will let
the system to use it only as a last resort.

Note CM3.x-based systems may also experience the problems with MIPS GIC
if the CPU-frequency change is activated for the whole CPU cluster
instead of using the individual CPC core clocks divider.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-rtc@vger.kernel.org
Cc: devicetree@vger.kernel.org
---
 drivers/clocksource/mips-gic-timer.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 802b93fe3ae7..095d65b48920 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -185,7 +185,10 @@ static int __init __gic_clocksource_init(void)
 	gic_clocksource.mask = CLOCKSOURCE_MASK(count_width);
 
 	/* Calculate a somewhat reasonable rating value. */
-	gic_clocksource.rating = 200 + gic_frequency / 10000000;
+	if (mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ))
+		gic_clocksource.rating = 200 + gic_frequency / 10000000;
+	else
+		gic_clocksource.rating = 99;
 
 	ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
 	if (ret < 0)
@@ -239,9 +242,11 @@ static int __init gic_clocksource_of_init(struct device_node *node)
 	/* And finally start the counter */
 	clear_gic_config(GIC_CONFIG_COUNTSTOP);
 
-	sched_clock_register(mips_cm_is64 ?
-			     gic_read_count_64 : gic_read_count_2x32,
-			     64, gic_frequency);
+	if (mips_cm_revision() >= CM_REV_CM3 || !IS_ENABLED(CONFIG_CPU_FREQ)) {
+		sched_clock_register(mips_cm_is64 ?
+				     gic_read_count_64 : gic_read_count_2x32,
+				     64, gic_frequency);
+	}
 
 	return 0;
 }
-- 
2.25.1


  parent reply	other threads:[~2020-05-06 21:41 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200306125622.839ED80307C4@mail.baikalelectronics.ru>
2020-03-24 17:43 ` [PATCH v2 0/6] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support Sergey.Semin
2020-03-24 17:43   ` [PATCH v2 1/6] dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema Sergey.Semin
2020-03-24 18:07     ` Alexandre Belloni
2020-03-24 18:20       ` Serge Semin
2020-03-31 20:14     ` Rob Herring
2020-03-24 17:43   ` [PATCH v2 2/6] dt-bindings: interrupt-controller: Convert mti,gic " Sergey.Semin
2020-03-31 21:02     ` Rob Herring
2020-04-01 10:19       ` Sergey Semin
2020-04-01 14:13         ` Rob Herring
2020-04-01 22:07           ` Sergey Semin
2020-05-06 21:41   ` [PATCH v3 0/7] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support Serge Semin
2020-05-06 21:41     ` [PATCH v3 1/7] dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema Serge Semin
2020-05-06 21:41     ` [PATCH v3 2/7] dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc Serge Semin
2020-05-07 12:03       ` Alexandre Belloni
2020-05-14 19:04       ` Rob Herring
2020-05-06 21:41     ` [PATCH v3 3/7] dt-bindings: interrupt-controller: Convert mti,gic to DT schema Serge Semin
2020-05-14 19:06       ` Rob Herring
2020-05-18 14:51         ` Serge Semin
2020-05-06 21:41     ` [PATCH v3 4/7] clocksource: dw_apb_timer: Set clockevent any-possible-CPU mask Serge Semin
2020-05-06 21:41     ` [PATCH v3 5/7] clocksource: dw_apb_timer_of: Fix missing clockevent timers Serge Semin
2020-05-06 21:41     ` [PATCH v3 6/7] clocksource: mips-gic-timer: Register as sched_clock Serge Semin
2020-05-06 21:41     ` Serge Semin [this message]
2020-05-15 17:10       ` [PATCH v3 7/7] clocksource: mips-gic-timer: Set limitations on clocksource/sched-clocks usage Daniel Lezcano
2020-05-16 12:16         ` Serge Semin
2020-05-18 13:59           ` Daniel Lezcano
2020-05-18 14:40             ` Serge Semin
2020-05-18 14:45               ` Serge Semin

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