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[88.10.102.251]) by smtp.gmail.com with ESMTPSA id q18sm134573625wrw.36.2019.08.13.01.47.14 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Tue, 13 Aug 2019 01:47:15 -0700 (PDT) Subject: Re: [PATCH v4 8/9] MIPS: SGI-IP27: fix readb/writeb addressing To: Greg Kroah-Hartman , Andy Shevchenko Cc: Thomas Bogendoerfer , Ralf Baechle , Paul Burton , James Hogan , Dmitry Torokhov , Lee Jones , "David S. Miller" , Srinivas Kandagatla , Alessandro Zummo , Alexandre Belloni , Jiri Slaby , Evgeniy Polyakov , linux-mips@vger.kernel.org, Linux Kernel Mailing List , linux-input , netdev , "open list:REAL TIME CLOCK (RTC) SUBSYSTEM" , "open list:SERIAL DRIVERS" References: <20190809103235.16338-1-tbogendoerfer@suse.de> <20190809103235.16338-9-tbogendoerfer@suse.de> <20190811072907.GA1416@kroah.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: url=http://pgp.mit.edu/pks/lookup?op=get&search=0xE3E32C2CDEADC0DE Message-ID: <90129235-58c2-aeed-a9d3-96f4a8f45709@amsat.org> Date: Tue, 13 Aug 2019 10:47:13 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190811072907.GA1416@kroah.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org Hi Thomas, On 8/11/19 9:29 AM, Greg Kroah-Hartman wrote: > On Sat, Aug 10, 2019 at 04:22:23PM +0300, Andy Shevchenko wrote: >> On Fri, Aug 9, 2019 at 1:34 PM Thomas Bogendoerfer >> wrote: >>> >>> Our chosen byte swapping, which is what firmware already uses, is to >>> do readl/writel by normal lw/sw intructions (data invariance). This >>> also means we need to mangle addresses for u8 and u16 accesses. The >>> mangling for 16bit has been done aready, but 8bit one was missing. >>> Correcting this causes different addresses for accesses to the >>> SuperIO and local bus of the IOC3 chip. This is fixed by changing >>> byte order in ioc3 and m48rtc_rtc structs. >> >>> /* serial port register map */ >>> struct ioc3_serialregs { >>> - uint32_t sscr; >>> - uint32_t stpir; >>> - uint32_t stcir; >>> - uint32_t srpir; >>> - uint32_t srcir; >>> - uint32_t srtr; >>> - uint32_t shadow; >>> + u32 sscr; >>> + u32 stpir; >>> + u32 stcir; >>> + u32 srpir; >>> + u32 srcir; >>> + u32 srtr; >>> + u32 shadow; >>> }; >> >> Isn't it a churn? AFAIU kernel documentation the uint32_t is okay to >> use, just be consistent inside one module / driver. >> Am I mistaken? > > No, but really it uint* shouldn't be used anywhere in the kernel source > as it does not make sense. If you respin your series, please send this cleanup as a separate patch. Thanks, Phil.