From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15024FA3732 for ; Thu, 17 Oct 2019 09:43:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EAD9B21925 for ; Thu, 17 Oct 2019 09:43:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393974AbfJQJny (ORCPT ); Thu, 17 Oct 2019 05:43:54 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:46248 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2393888AbfJQJnx (ORCPT ); Thu, 17 Oct 2019 05:43:53 -0400 Received: by mail-lj1-f195.google.com with SMTP id d1so1780159ljl.13; Thu, 17 Oct 2019 02:43:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=jh4gf950oYClWnD4Coi3ctcStnuW8fLUjgIauH0yMgo=; b=APLexERfkST1AGHTrcIRl/QYrmsbnR0dqG9bBTJy/3cOZYtU6FTJugXRTFYKSj7tig zRm9ZVNa5yQAXJ7o1xhgqaLcAm61c4+JVr1dXeUrz56XWxTV6Ml1+ukOpV0q8TKd+PmI EXWaLsWnICsjTp7WtiLst6M+L0pj7awstb0uZmQ2rJSfBqGDRlYvv+OdcQm2SeRmBYCK GY/ke9wLm/ckDOCa7ti1Tb1gWd9dvSHUmisBH9gM+I+NVPVuglhQAcHhcK+Is5x2LjpQ /YWopDEr8FOWXVhuBiMMwj0RF7Lj2TjrXv0SEHL5Q9xupoxB6da2LvJccpa6IHvBOxQQ PUow== X-Gm-Message-State: APjAAAWV1aAdicsG4rcWdK3dgcgU2o1G0dNE5mp2ElaATGt8nWtHzzNy ngX4eHAv8kFqgXixr8aeP70= X-Google-Smtp-Source: APXvYqwsqN/v09N3swS+yfo5KQfI30YTYAFNVCYxdNXOmv76b6xaf3XXKut9e+5Ile/SYxEnfoO5Yw== X-Received: by 2002:a2e:b049:: with SMTP id d9mr1822102ljl.121.1571305431036; Thu, 17 Oct 2019 02:43:51 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.46]) by smtp.gmail.com with ESMTPSA id k68sm788783lje.86.2019.10.17.02.43.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 02:43:50 -0700 (PDT) Date: Thu, 17 Oct 2019 12:43:38 +0300 From: Matti Vaittinen To: matti.vaittinen@fi.rohmeurope.com, mazziesaccount@gmail.com Cc: Lee Jones , Rob Herring , Mark Rutland , Liam Girdwood , Mark Brown , Michael Turquette , Stephen Boyd , Linus Walleij , Bartosz Golaszewski , Jacek Anaszewski , Pavel Machek , Dan Murphy , Alessandro Zummo , Alexandre Belloni , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-leds@vger.kernel.org, linux-rtc@vger.kernel.org Subject: [RFC PATCH 03/13] clk: bd718x7: Support ROHM BD71828 clk block Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.12.1 (2019-06-15) Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org BD71828GW is a single-chip power management IC for battery-powered portable devices. Add support for controlling BD71828 clk using bd718x7 driver. Signed-off-by: Matti Vaittinen --- drivers/clk/Kconfig | 6 +++--- drivers/clk/clk-bd718x7.c | 15 ++++++++++----- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 801fa1cd0321..1d61d94cdb29 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -302,10 +302,10 @@ config COMMON_CLK_STM32H7 Support for stm32h7 SoC family clocks config COMMON_CLK_BD718XX - tristate "Clock driver for ROHM BD718x7 PMIC" - depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 + tristate "Clock driver for 32K clk gates on ROHM PMICs" + depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828 help - This driver supports ROHM BD71837, ROHM BD71847 and + This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and ROHM BD70528 PMICs clock gates. config COMMON_CLK_FIXED_MMIO diff --git a/drivers/clk/clk-bd718x7.c b/drivers/clk/clk-bd718x7.c index ae6e5baee330..d17a19e04592 100644 --- a/drivers/clk/clk-bd718x7.c +++ b/drivers/clk/clk-bd718x7.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -21,10 +22,8 @@ struct bd718xx_clk { struct rohm_regmap_dev *mfd; }; -static int bd71837_clk_set(struct clk_hw *hw, int status) +static int bd71837_clk_set(struct bd718xx_clk *c, int status) { - struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); - return regmap_update_bits(c->mfd->regmap, c->reg, c->mask, status); } @@ -33,14 +32,16 @@ static void bd71837_clk_disable(struct clk_hw *hw) int rv; struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); - rv = bd71837_clk_set(hw, 0); + rv = bd71837_clk_set(c, 0); if (rv) dev_dbg(&c->pdev->dev, "Failed to disable 32K clk (%d)\n", rv); } static int bd71837_clk_enable(struct clk_hw *hw) { - return bd71837_clk_set(hw, 1); + struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); + + return bd71837_clk_set(c, 0xffffffff); } static int bd71837_clk_is_enabled(struct clk_hw *hw) @@ -93,6 +94,10 @@ static int bd71837_clk_probe(struct platform_device *pdev) c->reg = BD718XX_REG_OUT32K; c->mask = BD718XX_OUT32K_EN; break; + case ROHM_CHIP_TYPE_BD71828: + c->reg = BD71828_REG_OUT32K; + c->mask = BD71828_OUT32K_EN; + break; case ROHM_CHIP_TYPE_BD70528: c->reg = BD70528_REG_CLK_OUT; c->mask = BD70528_CLK_OUT_EN_MASK; -- 2.21.0 -- Matti Vaittinen, Linux device drivers ROHM Semiconductors, Finland SWDC Kiviharjunlenkki 1E 90220 OULU FINLAND ~~~ "I don't think so," said Rene Descartes. Just then he vanished ~~~ Simon says - in Latin please. ~~~ "non cogito me" dixit Rene Descarte, deinde evanescavit ~~~ Thanks to Simon Glass for the translation =]