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Wed, 12 Feb 2020 02:48:56 -0800 Received: from xsj-pvapsmtp01 (mailhub.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 01CAmnCf020766; Wed, 12 Feb 2020 02:48:49 -0800 Received: from [172.30.17.107] by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1j1pZY-0006Az-Vi; Wed, 12 Feb 2020 02:48:49 -0800 Subject: Re: [PATCH v2] rtc: zynqmp: Clear alarm interrupt status before interrupt enable To: Srinivas Neeli , a.zummo@towertech.it, alexandre.belloni@bootlin.com, michal.simek@xilinx.com, sgoud@xilinx.com, shubhraj@xilinx.com Cc: linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, git@xilinx.com References: <1581503079-387-1-git-send-email-srinivas.neeli@xilinx.com> From: Michal Simek Message-ID: Date: Wed, 12 Feb 2020 11:48:46 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <1581503079-387-1-git-send-email-srinivas.neeli@xilinx.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(189003)(199004)(70586007)(186003)(9786002)(70206006)(31696002)(2616005)(31686004)(336012)(2906002)(81166006)(81156014)(8936002)(8676002)(26005)(5660300002)(426003)(6666004)(356004)(4326008)(498600001)(107886003)(44832011)(36756003)(6636002);DIR:OUT;SFP:1101;SCL:1;SRVR:CY4PR02MB2501;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;MX:1;A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 970650e2-ed77-426a-7bb2-08d7afa92c15 X-MS-TrafficTypeDiagnostic: CY4PR02MB2501: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-Forefront-PRVS: 0311124FA9 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uxdqM9PHpKl2l7tmavdD2YEnoiTVBP9Qut6+AkR0pOdyKFHTM3YuF4MrGk3GnbXAn323oU1HKJDrGvVmgjA6KLQvYrh3HkqaT9cWs1vCpmNFZwaFzFuyeGR83+ImRa7HVyobI/UgtdSmzwxTA8SMCTtLxFEG/vxQBbLz02Tjac3ipvaWqnvHUf0tVdm2Z9oWEkKX0rrk4BVBBovTfXprJy3uXPIyOsEehQDsog+W3qEX7x9WEEledsrXvSMY3GM9nz5fUt3gKkJ0SiG9cXTtrlYQEX/iioPviSlJWwDL38Gluj2mRqk8xjblgd5nE5RZQ4DYFltBrE8mtXdwTte95IIDsGF25q2p5zwSfoaig8eLhTCa33aNlnQx2HSa85Z7Xy//QMBAu9mjTVzDbggme9Xe9HnH12V9Zy2ozvJxaGLMzUkERywrK0B882+2V0lb X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Feb 2020 10:49:01.7761 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 970650e2-ed77-426a-7bb2-08d7afa92c15 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR02MB2501 Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org On 12. 02. 20 11:24, Srinivas Neeli wrote: > Fix multiple occurring interrupts for alarm interrupt. RTC module doesn't > clear the alarm interrupt status bit immediately after the interrupt is > triggered.This is due to the sticky nature of the alarm interrupt status > register. The alarm interrupt status register can be cleared only after > the second counter outruns the set alarm value. To fix multiple spurious > interrupts, disable alarm interrupt in the handler and clear the status > bit before enabling the alarm interrupt. > > Fixes: 11143c19eb57 ("rtc: add xilinx zynqmp rtc driver") > Signed-off-by: Srinivas Neeli > --- > Changes in V2: > Addressed Michal Simek comments > - Removed new line in declartion part. > - Added new line before return. > --- > drivers/rtc/rtc-zynqmp.c | 27 +++++++++++++++++++++++---- > 1 file changed, 23 insertions(+), 4 deletions(-) > > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c > index 5786866c09e9..4b1077e2f826 100644 > --- a/drivers/rtc/rtc-zynqmp.c > +++ b/drivers/rtc/rtc-zynqmp.c > @@ -38,6 +38,8 @@ > > #define RTC_CALIB_DEF 0x198233 > #define RTC_CALIB_MASK 0x1FFFFF > +#define RTC_ALRM_MASK BIT(1) > +#define RTC_MSEC 1000 > > struct xlnx_rtc_dev { > struct rtc_device *rtc; > @@ -123,11 +125,28 @@ static int xlnx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) > static int xlnx_rtc_alarm_irq_enable(struct device *dev, u32 enabled) > { > struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); > + unsigned int status; > + ulong timeout; > + > + timeout = jiffies + msecs_to_jiffies(RTC_MSEC); > + > + if (enabled) { > + while (1) { > + status = readl(xrtcdev->reg_base + RTC_INT_STS); > + if (!((status & RTC_ALRM_MASK) == RTC_ALRM_MASK)) > + break; > + > + if (time_after_eq(jiffies, timeout)) { > + dev_err(dev, "Time out occur, while clearing alarm status bit\n"); > + return -ETIMEDOUT; > + } > + writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS); > + } > > - if (enabled) > writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_EN); > - else > + } else { > writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS); > + } > > return 0; > } > @@ -183,8 +202,8 @@ static irqreturn_t xlnx_rtc_interrupt(int irq, void *id) > if (!(status & (RTC_INT_SEC | RTC_INT_ALRM))) > return IRQ_NONE; > > - /* Clear RTC_INT_ALRM interrupt only */ > - writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_STS); > + /* Disable RTC_INT_ALRM interrupt only */ > + writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS); > > if (status & RTC_INT_ALRM) > rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF | RTC_AF); > Acked-by: Michal Simek Thanks, Michal