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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id e16sm332752qtq.18.2021.09.28.15.07.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 15:07:39 -0700 (PDT) Date: Tue, 28 Sep 2021 15:07:39 -0700 (PDT) X-Google-Original-Date: Tue, 28 Sep 2021 15:07:35 PDT (-0700) Subject: Re: [RFC PATCH 7/8] riscv: rely on core code to keep thread_info::cpu updated In-Reply-To: <20210914121036.3975026-8-ardb@kernel.org> CC: linux-kernel@vger.kernel.org, ardb@kernel.org, keithpac@amazon.com, linux@armlinux.org.uk, catalin.marinas@arm.com, will@kernel.org, mpe@ellerman.id.au, benh@kernel.crashing.org, christophe.leroy@csgroup.eu, paulus@samba.org, Paul Walmsley , aou@eecs.berkeley.edu, hca@linux.ibm.com, gor@linux.ibm.com, borntraeger@de.ibm.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, peterz@infradead.org, keescook@chromium.org, luto@kernel.org, Linus Torvalds , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org From: Palmer Dabbelt To: ardb@kernel.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On Tue, 14 Sep 2021 05:10:35 PDT (-0700), ardb@kernel.org wrote: > Now that the core code switched back to using thread_info::cpu to keep > a task's CPU number, we no longer need to keep it in sync explicitly. So > just drop the code that does this. > > Signed-off-by: Ard Biesheuvel > --- > arch/riscv/kernel/asm-offsets.c | 1 - > arch/riscv/kernel/entry.S | 5 ----- > arch/riscv/kernel/head.S | 1 - > 3 files changed, 7 deletions(-) > > diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c > index 90f8ce64fa6f..478d9f02dab5 100644 > --- a/arch/riscv/kernel/asm-offsets.c > +++ b/arch/riscv/kernel/asm-offsets.c > @@ -33,7 +33,6 @@ void asm_offsets(void) > OFFSET(TASK_TI_PREEMPT_COUNT, task_struct, thread_info.preempt_count); > OFFSET(TASK_TI_KERNEL_SP, task_struct, thread_info.kernel_sp); > OFFSET(TASK_TI_USER_SP, task_struct, thread_info.user_sp); > - OFFSET(TASK_TI_CPU, task_struct, thread_info.cpu); > > OFFSET(TASK_THREAD_F0, task_struct, thread.fstate.f[0]); > OFFSET(TASK_THREAD_F1, task_struct, thread.fstate.f[1]); > diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S > index 98f502654edd..459eb1714353 100644 > --- a/arch/riscv/kernel/entry.S > +++ b/arch/riscv/kernel/entry.S > @@ -544,11 +544,6 @@ ENTRY(__switch_to) > REG_L s9, TASK_THREAD_S9_RA(a4) > REG_L s10, TASK_THREAD_S10_RA(a4) > REG_L s11, TASK_THREAD_S11_RA(a4) > - /* Swap the CPU entry around. */ > - lw a3, TASK_TI_CPU(a0) > - lw a4, TASK_TI_CPU(a1) > - sw a3, TASK_TI_CPU(a1) > - sw a4, TASK_TI_CPU(a0) > /* The offset of thread_info in task_struct is zero. */ > move tp, a1 > ret > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > index fce5184b22c3..d5ec30ef6f5d 100644 > --- a/arch/riscv/kernel/head.S > +++ b/arch/riscv/kernel/head.S > @@ -317,7 +317,6 @@ clear_bss_done: > call setup_trap_vector > /* Restore C environment */ > la tp, init_task > - sw zero, TASK_TI_CPU(tp) > la sp, init_thread_union + THREAD_SIZE > > #ifdef CONFIG_KASAN Acked-by: Palmer Dabbelt Thanks!