From: Andi Shyti <andi.shyti@samsung.com>
To: Chanwoo Choi <cw00.choi@samsung.com>,
Tomasz Figa <tomasz.figa@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Kukjin Kim <kgene@kernel.org>,
Javier Martinez Canillas <javier@osg.samsung.com>,
Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org, Andi Shyti <andi.shyti@samsung.com>,
Andi Shyti <andi@etezian.org>
Subject: [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
Date: Fri, 30 Dec 2016 13:14:21 +0900 [thread overview]
Message-ID: <20161230041421.24448-5-andi.shyti@samsung.com> (raw)
In-Reply-To: <20161230041421.24448-1-andi.shyti@samsung.com>
Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 25 +-
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++-----------
2 files changed, 133 insertions(+), 146 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 2af854b11644..d49879bd34bb 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -14,25 +14,12 @@
#include <dt-bindings/pinctrl/samsung.h>
-#define PIN_PULL_NONE 0
-#define PIN_PULL_DOWN 1
-#define PIN_PULL_UP 3
-
-#define PIN_DRV_LV1 0
-#define PIN_DRV_LV2 2
-#define PIN_DRV_LV3 1
-#define PIN_DRV_LV4 3
-
-#define PIN_IN 0
-#define PIN_OUT 1
-#define PIN_FUNC1 2
-
-#define PIN(_func, _pin, _pull, _drv) \
- _pin { \
- samsung,pins = #_pin; \
- samsung,pin-function = <PIN_ ##_func>; \
- samsung,pin-pud = <PIN_PULL_ ##_pull>; \
- samsung,pin-drv = <PIN_DRV_ ##_drv>; \
+#define PIN(_func, _pin, _pull, _drv) \
+ _pin { \
+ samsung,pins = #_pin; \
+ samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
+ samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
+ samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
}
&pinctrl_alive {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index f21bdc2ff834..66c4d5959881 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -742,77 +742,77 @@
pinctrl-0 = <&initial_alive>;
initial_alive: initial-state {
- PIN(IN, gpa0-0, DOWN, LV1);
- PIN(IN, gpa0-1, NONE, LV1);
- PIN(IN, gpa0-2, DOWN, LV1);
- PIN(IN, gpa0-3, NONE, LV1);
- PIN(IN, gpa0-4, NONE, LV1);
- PIN(IN, gpa0-5, DOWN, LV1);
- PIN(IN, gpa0-6, NONE, LV1);
- PIN(IN, gpa0-7, NONE, LV1);
-
- PIN(IN, gpa1-0, UP, LV1);
- PIN(IN, gpa1-1, NONE, LV1);
- PIN(IN, gpa1-2, NONE, LV1);
- PIN(IN, gpa1-3, DOWN, LV1);
- PIN(IN, gpa1-4, DOWN, LV1);
- PIN(IN, gpa1-5, NONE, LV1);
- PIN(IN, gpa1-6, NONE, LV1);
- PIN(IN, gpa1-7, NONE, LV1);
-
- PIN(IN, gpa2-0, NONE, LV1);
- PIN(IN, gpa2-1, NONE, LV1);
- PIN(IN, gpa2-2, NONE, LV1);
- PIN(IN, gpa2-3, DOWN, LV1);
- PIN(IN, gpa2-4, NONE, LV1);
- PIN(IN, gpa2-5, DOWN, LV1);
- PIN(IN, gpa2-6, DOWN, LV1);
- PIN(IN, gpa2-7, NONE, LV1);
-
- PIN(IN, gpa3-0, DOWN, LV1);
- PIN(IN, gpa3-1, DOWN, LV1);
- PIN(IN, gpa3-2, NONE, LV1);
- PIN(IN, gpa3-3, DOWN, LV1);
- PIN(IN, gpa3-4, NONE, LV1);
- PIN(IN, gpa3-5, DOWN, LV1);
- PIN(IN, gpa3-6, DOWN, LV1);
- PIN(IN, gpa3-7, DOWN, LV1);
-
- PIN(IN, gpf1-0, NONE, LV1);
- PIN(IN, gpf1-1, NONE, LV1);
- PIN(IN, gpf1-2, DOWN, LV1);
- PIN(IN, gpf1-4, UP, LV1);
- PIN(OUT, gpf1-5, NONE, LV1);
- PIN(IN, gpf1-6, DOWN, LV1);
- PIN(IN, gpf1-7, DOWN, LV1);
-
- PIN(IN, gpf2-0, DOWN, LV1);
- PIN(IN, gpf2-1, DOWN, LV1);
- PIN(IN, gpf2-2, DOWN, LV1);
- PIN(IN, gpf2-3, DOWN, LV1);
-
- PIN(IN, gpf3-0, DOWN, LV1);
- PIN(IN, gpf3-1, DOWN, LV1);
- PIN(IN, gpf3-2, NONE, LV1);
- PIN(IN, gpf3-3, DOWN, LV1);
-
- PIN(IN, gpf4-0, DOWN, LV1);
- PIN(IN, gpf4-1, DOWN, LV1);
- PIN(IN, gpf4-2, DOWN, LV1);
- PIN(IN, gpf4-3, DOWN, LV1);
- PIN(IN, gpf4-4, DOWN, LV1);
- PIN(IN, gpf4-5, DOWN, LV1);
- PIN(IN, gpf4-6, DOWN, LV1);
- PIN(IN, gpf4-7, DOWN, LV1);
-
- PIN(IN, gpf5-0, DOWN, LV1);
- PIN(IN, gpf5-1, DOWN, LV1);
- PIN(IN, gpf5-2, DOWN, LV1);
- PIN(IN, gpf5-3, DOWN, LV1);
- PIN(OUT, gpf5-4, NONE, LV1);
- PIN(IN, gpf5-5, DOWN, LV1);
- PIN(IN, gpf5-6, DOWN, LV1);
- PIN(IN, gpf5-7, DOWN, LV1);
+ PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-3, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa0-6, NONE, FAST_SR1);
+ PIN(INPUT, gpa0-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa1-0, UP, FAST_SR1);
+ PIN(INPUT, gpa1-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpa1-5, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-6, NONE, FAST_SR1);
+ PIN(INPUT, gpa1-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa2-0, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-1, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpa2-7, NONE, FAST_SR1);
+
+ PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-2, NONE, FAST_SR1);
+ PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-4, NONE, FAST_SR1);
+ PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf1-0, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-1, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf1-4, UP, FAST_SR1);
+ PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
+ PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf3-2, NONE, FAST_SR1);
+ PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
+
+ PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
+ PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
+ PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
};
te_irq: te_irq {
@@ -826,8 +826,8 @@
pinctrl-0 = <&initial_cpif>;
initial_cpif: initial-state {
- PIN(IN, gpv6-0, DOWN, LV1);
- PIN(IN, gpv6-1, DOWN, LV1);
+ PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
};
};
@@ -836,9 +836,9 @@
pinctrl-0 = <&initial_ese>;
initial_ese: initial-state {
- PIN(IN, gpj2-0, DOWN, LV1);
- PIN(IN, gpj2-1, DOWN, LV1);
- PIN(IN, gpj2-2, DOWN, LV1);
+ PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
};
};
@@ -847,11 +847,11 @@
pinctrl-0 = <&initial_fsys>;
initial_fsys: initial-state {
- PIN(IN, gpr3-0, NONE, LV1);
- PIN(IN, gpr3-1, DOWN, LV1);
- PIN(IN, gpr3-2, DOWN, LV1);
- PIN(IN, gpr3-3, DOWN, LV1);
- PIN(IN, gpr3-7, NONE, LV1);
+ PIN(INPUT, gpr3-0, NONE, FAST_SR1);
+ PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpr3-7, NONE, FAST_SR1);
};
};
@@ -860,14 +860,14 @@
pinctrl-0 = <&initial_imem>;
initial_imem: initial-state {
- PIN(IN, gpf0-0, UP, LV1);
- PIN(IN, gpf0-1, UP, LV1);
- PIN(IN, gpf0-2, DOWN, LV1);
- PIN(IN, gpf0-3, UP, LV1);
- PIN(IN, gpf0-4, DOWN, LV1);
- PIN(IN, gpf0-5, NONE, LV1);
- PIN(IN, gpf0-6, DOWN, LV1);
- PIN(IN, gpf0-7, UP, LV1);
+ PIN(INPUT, gpf0-0, UP, FAST_SR1);
+ PIN(INPUT, gpf0-1, UP, FAST_SR1);
+ PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-3, UP, FAST_SR1);
+ PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-5, NONE, FAST_SR1);
+ PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
+ PIN(INPUT, gpf0-7, UP, FAST_SR1);
};
};
@@ -876,7 +876,7 @@
pinctrl-0 = <&initial_nfc>;
initial_nfc: initial-state {
- PIN(IN, gpj0-2, DOWN, LV1);
+ PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
};
};
@@ -885,54 +885,54 @@
pinctrl-0 = <&initial_peric>;
initial_peric: initial-state {
- PIN(IN, gpv7-0, DOWN, LV1);
- PIN(IN, gpv7-1, DOWN, LV1);
- PIN(IN, gpv7-2, NONE, LV1);
- PIN(IN, gpv7-3, DOWN, LV1);
- PIN(IN, gpv7-4, DOWN, LV1);
- PIN(IN, gpv7-5, DOWN, LV1);
+ PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-2, NONE, FAST_SR1);
+ PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
+ PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
- PIN(IN, gpb0-4, DOWN, LV1);
+ PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
- PIN(IN, gpc0-2, DOWN, LV1);
- PIN(IN, gpc0-5, DOWN, LV1);
- PIN(IN, gpc0-7, DOWN, LV1);
+ PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
- PIN(IN, gpc1-1, DOWN, LV1);
+ PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
- PIN(IN, gpc3-4, NONE, LV1);
- PIN(IN, gpc3-5, NONE, LV1);
- PIN(IN, gpc3-6, NONE, LV1);
- PIN(IN, gpc3-7, NONE, LV1);
+ PIN(INPUT, gpc3-4, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-5, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-6, NONE, FAST_SR1);
+ PIN(INPUT, gpc3-7, NONE, FAST_SR1);
- PIN(OUT, gpg0-0, NONE, LV1);
- PIN(FUNC1, gpg0-1, DOWN, LV1);
+ PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
+ PIN(2, gpg0-1, DOWN, FAST_SR1);
- PIN(IN, gpd2-5, DOWN, LV1);
+ PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
- PIN(IN, gpd4-0, NONE, LV1);
- PIN(IN, gpd4-1, DOWN, LV1);
- PIN(IN, gpd4-2, DOWN, LV1);
- PIN(IN, gpd4-3, DOWN, LV1);
- PIN(IN, gpd4-4, DOWN, LV1);
+ PIN(INPUT, gpd4-0, NONE, FAST_SR1);
+ PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
- PIN(IN, gpd6-3, DOWN, LV1);
+ PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
- PIN(IN, gpd8-1, UP, LV1);
+ PIN(INPUT, gpd8-1, UP, FAST_SR1);
- PIN(IN, gpg1-0, DOWN, LV1);
- PIN(IN, gpg1-1, DOWN, LV1);
- PIN(IN, gpg1-2, DOWN, LV1);
- PIN(IN, gpg1-3, DOWN, LV1);
- PIN(IN, gpg1-4, DOWN, LV1);
+ PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
+ PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
- PIN(IN, gpg2-0, DOWN, LV1);
- PIN(IN, gpg2-1, DOWN, LV1);
+ PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
- PIN(IN, gpg3-0, DOWN, LV1);
- PIN(IN, gpg3-1, DOWN, LV1);
- PIN(IN, gpg3-5, DOWN, LV1);
- PIN(IN, gpg3-7, DOWN, LV1);
+ PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
+ PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
};
};
@@ -941,7 +941,7 @@
pinctrl-0 = <&initial_touch>;
initial_touch: initial-state {
- PIN(IN, gpj1-2, DOWN, LV1);
+ PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
};
};
--
2.11.0
next prev parent reply other threads:[~2016-12-30 4:14 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20161230041426epcas1p1a8564e969a8f6a1746a3af9b26aac99f@epcas1p1.samsung.com>
2016-12-30 4:14 ` [PATCH v2 0/4] Use Exynos macros for pinctrl settings Andi Shyti
[not found] ` <CGME20161230041426epcas1p1f827d3cee8b607d81e9921b412ddf301@epcas1p1.samsung.com>
[not found] ` <20161230041421.24448-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30 4:14 ` [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433 Andi Shyti
2016-12-30 13:28 ` Linus Walleij
[not found] ` <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-12-30 15:09 ` Krzysztof Kozlowski
2017-01-03 9:45 ` Andi Shyti
2017-02-24 0:22 ` Chanwoo Choi
[not found] ` <58AF7CCB.5070303-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-03-14 13:47 ` Linus Walleij
2017-03-14 14:27 ` Krzysztof Kozlowski
2017-03-15 13:52 ` Linus Walleij
[not found] ` <CGME20161230041427epcas1p1e4d0dd5e7f9928664c664b7850dbd87a@epcas1p1.samsung.com>
2016-12-30 4:14 ` [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros " Andi Shyti
[not found] ` <20161230041421.24448-3-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30 6:37 ` Chanwoo Choi
2016-12-30 13:30 ` Linus Walleij
2017-01-06 6:48 ` Krzysztof Kozlowski
[not found] ` <CGME20161230041427epcas1p1151d6e28fac143c63efaf4f7c8ed432d@epcas1p1.samsung.com>
2016-12-30 4:14 ` [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433 Andi Shyti
[not found] ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30 6:38 ` Chanwoo Choi
2016-12-30 13:32 ` Linus Walleij
2016-12-30 15:17 ` Krzysztof Kozlowski
2017-01-03 8:24 ` Linus Walleij
2017-01-05 20:08 ` Krzysztof Kozlowski
2017-01-06 2:23 ` Andi Shyti
2017-01-06 6:18 ` Krzysztof Kozlowski
2016-12-30 20:28 ` Andi Shyti
2017-01-06 6:48 ` Krzysztof Kozlowski
[not found] ` <CGME20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973@epcas1p1.samsung.com>
2016-12-30 4:14 ` Andi Shyti [this message]
[not found] ` <20161230041421.24448-5-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30 6:41 ` [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention Chanwoo Choi
2017-01-06 6:49 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161230041421.24448-5-andi.shyti@samsung.com \
--to=andi.shyti@samsung.com \
--cc=andi@etezian.org \
--cc=catalin.marinas@arm.com \
--cc=cw00.choi@samsung.com \
--cc=devicetree@vger.kernel.org \
--cc=javier@osg.samsung.com \
--cc=kgene@kernel.org \
--cc=krzk@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=s.nawrocki@samsung.com \
--cc=stable@vger.kernel.org \
--cc=tomasz.figa@gmail.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).