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* [PATCH v2 0/4] Use Exynos macros for pinctrl settings
       [not found] <CGME20161230041426epcas1p1a8564e969a8f6a1746a3af9b26aac99f@epcas1p1.samsung.com>
@ 2016-12-30  4:14 ` Andi Shyti
       [not found]   ` <CGME20161230041426epcas1p1f827d3cee8b607d81e9921b412ddf301@epcas1p1.samsung.com>
                     ` (3 more replies)
  0 siblings, 4 replies; 26+ messages in thread
From: Andi Shyti @ 2016-12-30  4:14 UTC (permalink / raw)
  To: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	stable-u79uwXL29TY76Z2rM5mHXA, Andi Shyti, Andi Shyti


Hi,

This patchset fixes the width and offsets of the PINCFG_TYPE_DRV
bitfields for the Exynos5433 SoC.

Moreover it refactors the pinctrl definitions by using the
dt-bindings/pinctrl/samsung.h definitions introduced by Krzysztof
in 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration").

It would be nice to see in the future all the PIN related macros
in the same file, as they more or less do the same thing.

Changelog v1 -> v2
==================
V1: https://lkml.org/lkml/2016/12/29/40

- Added Chanwoo's patch for fixing the slew rate register width.
- Patch 4 is squashed with the patch3 and 4 of v1.

Thanks,
Andi

Andi Shyti (3):
  pinctrl: dt-bindings: samsung: add drive strength macros for
    Exynos5433
  ARM64: dts: exynos5433: use macros for pinctrl configuration on
    Exynos5433
  ARM64: dts: TM2: comply to the samsung pinctrl naming convention

Chanwoo Choi (1):
  pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for
    Exynos5433

 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 373 ++++++++++-----------
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      | 254 +++++++-------
 drivers/pinctrl/samsung/pinctrl-exynos.c           |  91 ++---
 drivers/pinctrl/samsung/pinctrl-exynos.h           |  31 ++
 include/dt-bindings/pinctrl/samsung.h              |  14 +
 5 files changed, 404 insertions(+), 359 deletions(-)

-- 
2.11.0

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^ permalink raw reply	[flat|nested] 26+ messages in thread

* [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
       [not found]     ` <20161230041421.24448-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2016-12-30  4:14       ` Andi Shyti
  2016-12-30 13:28         ` Linus Walleij
  0 siblings, 1 reply; 26+ messages in thread
From: Andi Shyti @ 2016-12-30  4:14 UTC (permalink / raw)
  To: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	stable-u79uwXL29TY76Z2rM5mHXA, Andi Shyti, Andi Shyti

From: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.

Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Tomasz Figa <tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Cc: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Javier Martinez Canillas <javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
 drivers/pinctrl/samsung/pinctrl-exynos.c | 91 ++++++++++++++++++--------------
 drivers/pinctrl/samsung/pinctrl-exynos.h | 31 +++++++++++
 2 files changed, 82 insertions(+), 40 deletions(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 12f7d1eb65bc..07409fde02b2 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -56,6 +56,17 @@ static const struct samsung_pin_bank_type bank_type_alive = {
 	.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
 };
 
+/* Exynos5433 has the 4bit widths for PINCFG_TYPE_DRV bitfields. */
+static const struct samsung_pin_bank_type exynos5433_bank_type_off = {
+	.fld_width = { 4, 1, 2, 4, 2, 2, },
+	.reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
+};
+
+static const struct samsung_pin_bank_type exynos5433_bank_type_alive = {
+	.fld_width = { 4, 1, 2, 4, },
+	.reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
+};
+
 static void exynos_irq_mask(struct irq_data *irqd)
 {
 	struct irq_chip *chip = irq_data_get_irq_chip(irqd);
@@ -1335,82 +1346,82 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
 
 /* pin banks of exynos5433 pin-controller - ALIVE */
 static const struct samsung_pin_bank_data exynos5433_pin_banks0[] = {
-	EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
-	EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
-	EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
-	EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
-	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
-	EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
-	EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
-	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
-	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
+	EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+	EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+	EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+	EXYNOS5433_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+	EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
+	EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
+	EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
+	EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
+	EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
 };
 
 /* pin banks of exynos5433 pin-controller - AUD */
 static const struct samsung_pin_bank_data exynos5433_pin_banks1[] = {
-	EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
-	EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
+	EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
 };
 
 /* pin banks of exynos5433 pin-controller - CPIF */
 static const struct samsung_pin_bank_data exynos5433_pin_banks2[] = {
-	EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - eSE */
 static const struct samsung_pin_bank_data exynos5433_pin_banks3[] = {
-	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - FINGER */
 static const struct samsung_pin_bank_data exynos5433_pin_banks4[] = {
-	EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - FSYS */
 static const struct samsung_pin_bank_data exynos5433_pin_banks5[] = {
-	EXYNOS_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
-	EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
-	EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
-	EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
-	EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
-	EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
+	EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
+	EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
 };
 
 /* pin banks of exynos5433 pin-controller - IMEM */
 static const struct samsung_pin_bank_data exynos5433_pin_banks6[] = {
-	EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - NFC */
 static const struct samsung_pin_bank_data exynos5433_pin_banks7[] = {
-	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - PERIC */
 static const struct samsung_pin_bank_data exynos5433_pin_banks8[] = {
-	EXYNOS_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
-	EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
-	EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
-	EXYNOS_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
-	EXYNOS_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
-	EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
-	EXYNOS_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
-	EXYNOS_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
-	EXYNOS_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
-	EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
-	EXYNOS_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
-	EXYNOS_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
-	EXYNOS_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
-	EXYNOS_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
-	EXYNOS_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
-	EXYNOS_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
-	EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
+	EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
+	EXYNOS5433_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
+	EXYNOS5433_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
+	EXYNOS5433_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
+	EXYNOS5433_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
+	EXYNOS5433_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
+	EXYNOS5433_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
+	EXYNOS5433_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
+	EXYNOS5433_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
+	EXYNOS5433_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
 };
 
 /* pin banks of exynos5433 pin-controller - TOUCH */
 static const struct samsung_pin_bank_data exynos5433_pin_banks9[] = {
-	EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+	EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
 };
 
 /*
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h
index 5821525a2c84..a473092fb8d2 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.h
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.h
@@ -90,6 +90,37 @@
 		.pctl_res_idx   = pctl_idx,             \
 	}						\
 
+#define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs)		\
+	{							\
+		.type		= &exynos5433_bank_type_off,	\
+		.pctl_offset	= reg,				\
+		.nr_pins	= pins,				\
+		.eint_type	= EINT_TYPE_GPIO,		\
+		.eint_offset	= offs,				\
+		.name		= id				\
+	}
+
+#define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs)		\
+	{							\
+		.type		= &exynos5433_bank_type_alive,	\
+		.pctl_offset	= reg,				\
+		.nr_pins	= pins,				\
+		.eint_type	= EINT_TYPE_WKUP,		\
+		.eint_offset	= offs,				\
+		.name		= id				\
+	}
+
+#define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
+	{							\
+		.type           = &exynos5433_bank_type_alive,	\
+		.pctl_offset    = reg,				\
+		.nr_pins        = pins,				\
+		.eint_type      = EINT_TYPE_WKUP,		\
+		.eint_offset    = offs,				\
+		.name           = id,				\
+		.pctl_res_idx   = pctl_idx,			\
+	}							\
+
 /**
  * struct exynos_weint_data: irq specific data for all the wakeup interrupts
  * generated by the external wakeup interrupt controller.
-- 
2.11.0

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^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
       [not found]   ` <CGME20161230041427epcas1p1e4d0dd5e7f9928664c664b7850dbd87a@epcas1p1.samsung.com>
@ 2016-12-30  4:14     ` Andi Shyti
       [not found]       ` <20161230041421.24448-3-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
  0 siblings, 1 reply; 26+ messages in thread
From: Andi Shyti @ 2016-12-30  4:14 UTC (permalink / raw)
  To: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
	stable, Andi Shyti, Andi Shyti

Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration") has added a header file for defining the
pinctrl values in order to avoid hardcoded settings in the Exynos
DTS related files.

Extend samsung.h to the Exynos5433 for drive strength values
which are strictly related to the particular SoC and may defer
from others.

Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
 include/dt-bindings/pinctrl/samsung.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
index 6276eb785e2b..e0ebb20ffdd3 100644
--- a/include/dt-bindings/pinctrl/samsung.h
+++ b/include/dt-bindings/pinctrl/samsung.h
@@ -45,6 +45,20 @@
 #define EXYNOS5420_PIN_DRV_LV3		2
 #define EXYNOS5420_PIN_DRV_LV4		3
 
+/* Drive strengths for Exynos5433 */
+#define EXYNOS5433_PIN_DRV_FAST_SR1	0
+#define EXYNOS5433_PIN_DRV_FAST_SR2	1
+#define EXYNOS5433_PIN_DRV_FAST_SR3	2
+#define EXYNOS5433_PIN_DRV_FAST_SR4	3
+#define EXYNOS5433_PIN_DRV_FAST_SR5	4
+#define EXYNOS5433_PIN_DRV_FAST_SR6	5
+#define EXYNOS5433_PIN_DRV_SLOW_SR1	8
+#define EXYNOS5433_PIN_DRV_SLOW_SR2	9
+#define EXYNOS5433_PIN_DRV_SLOW_SR3	0xa
+#define EXYNOS5433_PIN_DRV_SLOW_SR4	0xb
+#define EXYNOS5433_PIN_DRV_SLOW_SR5	0xc
+#define EXYNOS5433_PIN_DRV_SLOW_SR6	0xf
+
 #define EXYNOS_PIN_FUNC_INPUT		0
 #define EXYNOS_PIN_FUNC_OUTPUT		1
 #define EXYNOS_PIN_FUNC_2		2
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
       [not found]   ` <CGME20161230041427epcas1p1151d6e28fac143c63efaf4f7c8ed432d@epcas1p1.samsung.com>
@ 2016-12-30  4:14     ` Andi Shyti
       [not found]       ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
                         ` (2 more replies)
  0 siblings, 3 replies; 26+ messages in thread
From: Andi Shyti @ 2016-12-30  4:14 UTC (permalink / raw)
  To: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
	stable, Andi Shyti, Andi Shyti

Use the macros defined in include/dt-bindings/pinctrl/samsung.h
instead of hardcoded values.

Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
 1 file changed, 175 insertions(+), 173 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index ad71247b074f..2af854b11644 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -12,6 +12,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/pinctrl/samsung.h>
+
 #define PIN_PULL_NONE		0
 #define PIN_PULL_DOWN		1
 #define PIN_PULL_UP		3
@@ -145,23 +147,23 @@
 	i2s0_bus: i2s0-bus {
 		samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
 				"gpz0-4", "gpz0-5", "gpz0-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pcm0_bus: pcm0-bus {
 		samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	uart_aud_bus: uart-aud-bus {
 		samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 };
 
@@ -196,16 +198,16 @@
 
 	spi2_bus: spi2-bus {
 		samsung,pins = "gpd5-0", "gpd5-2", "gpd5-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c6_bus: hs-i2c6-bus {
 		samsung,pins = "gpd5-3", "gpd5-2";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 };
 
@@ -260,141 +262,141 @@
 
 	sd0_clk: sd0-clk {
 		samsung,pins = "gpr0-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_cmd: sd0-cmd {
 		samsung,pins = "gpr0-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_rdqs: sd0-rdqs {
 		samsung,pins = "gpr0-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_qrdy: sd0-qrdy {
 		samsung,pins = "gpr0-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_bus1: sd0-bus-width1 {
 		samsung,pins = "gpr1-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_bus4: sd0-bus-width4 {
 		samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd0_bus8: sd0-bus-width8 {
 		samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd1_clk: sd1-clk {
 		samsung,pins = "gpr2-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd1_cmd: sd1-cmd {
 		samsung,pins = "gpr2-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd1_bus1: sd1-bus-width1 {
 		samsung,pins = "gpr3-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd1_bus4: sd1-bus-width4 {
 		samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd1_bus8: sd1-bus-width8 {
 		samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	pcie_bus: pcie_bus {
 		samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
 	};
 
 	sd2_clk: sd2-clk {
 		samsung,pins = "gpr4-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd2_cmd: sd2-cmd {
 		samsung,pins = "gpr4-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd2_cd: sd2-cd {
 		samsung,pins = "gpr4-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd2_bus1: sd2-bus-width1 {
 		samsung,pins = "gpr4-3";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd2_bus4: sd2-bus-width4 {
 		samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <3>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
 	};
 
 	sd2_clk_output: sd2-clk-output {
 		samsung,pins = "gpr4-0";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <2>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
 	};
 
 	sd2_cmd_output: sd2-cmd-output {
 		samsung,pins = "gpr4-1";
-		samsung,pin-function = <1>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <2>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
 	};
 };
 
@@ -419,9 +421,9 @@
 
 	hs_i2c4_bus: hs-i2c4-bus {
 		samsung,pins = "gpj0-1", "gpj0-0";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 };
 
@@ -564,225 +566,225 @@
 
 	hs_i2c8_bus: hs-i2c8-bus {
 		samsung,pins = "gpb0-1", "gpb0-0";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c9_bus: hs-i2c9-bus {
 		samsung,pins = "gpb0-3", "gpb0-2";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	i2s1_bus: i2s1-bus {
 		samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
 				"gpd4-3", "gpd4-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pcm1_bus: pcm1-bus {
 		samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
 				"gpd4-3", "gpd4-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	spdif_bus: spdif-bus {
 		samsung,pins = "gpd4-3", "gpd4-4";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <1>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_spi_pin0: fimc-is-spi-pin0 {
 		samsung,pins = "gpc3-3", "gpc3-2", "gpc3-1", "gpc3-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_spi_pin1: fimc-is-spi-pin1 {
 		samsung,pins = "gpc3-7", "gpc3-6", "gpc3-5", "gpc3-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	uart0_bus: uart0-bus {
 		samsung,pins = "gpd0-3", "gpd0-2", "gpd0-1", "gpd0-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 	};
 
 	hs_i2c2_bus: hs-i2c2-bus {
 		samsung,pins = "gpd0-3", "gpd0-2";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	uart2_bus: uart2-bus {
 		samsung,pins = "gpd1-5", "gpd1-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 	};
 
 	uart1_bus: uart1-bus {
 		samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
 	};
 
 	hs_i2c3_bus: hs-i2c3-bus {
 		samsung,pins = "gpd1-3", "gpd1-2";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c0_bus: hs-i2c0-bus {
 		samsung,pins = "gpd2-1", "gpd2-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c1_bus: hs-i2c1-bus {
 		samsung,pins = "gpd2-3", "gpd2-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pwm0_out: pwm0-out {
 		samsung,pins = "gpd2-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pwm1_out: pwm1-out {
 		samsung,pins = "gpd2-5";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pwm2_out: pwm2-out {
 		samsung,pins = "gpd2-6";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	pwm3_out: pwm3-out {
 		samsung,pins = "gpd2-7";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	spi1_bus: spi1-bus {
 		samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c7_bus: hs-i2c7-bus {
 		samsung,pins = "gpd2-7", "gpd2-6";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	spi0_bus: spi0-bus {
 		samsung,pins = "gpd8-0", "gpd6-0", "gpd6-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c10_bus: hs-i2c10-bus {
 		samsung,pins = "gpg3-1", "gpg3-0";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	hs_i2c11_bus: hs-i2c11-bus {
 		samsung,pins = "gpg3-3", "gpg3-2";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	spi3_bus: spi3-bus {
 		samsung,pins = "gpg3-4", "gpg3-6", "gpg3-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	spi4_bus: spi4-bus {
 		samsung,pins = "gpv7-1", "gpv7-3", "gpv7-4";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_uart: fimc-is-uart {
 		samsung,pins = "gpc1-1", "gpc0-7";
-		samsung,pin-function = <3>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch0_i2c: fimc-is-ch0_i2c {
 		samsung,pins = "gpc2-1", "gpc2-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch0_mclk: fimc-is-ch0_mclk {
 		samsung,pins = "gpd7-0";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch1_i2c: fimc-is-ch1-i2c {
 		samsung,pins = "gpc2-3", "gpc2-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch1_mclk: fimc-is-ch1-mclk {
 		samsung,pins = "gpd7-1";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch2_i2c: fimc-is-ch2-i2c {
 		samsung,pins = "gpc2-5", "gpc2-4";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 
 	fimc_is_ch2_mclk: fimc-is-ch2-mclk {
 		samsung,pins = "gpd7-2";
-		samsung,pin-function = <2>;
-		samsung,pin-pud = <0>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 };
 
@@ -797,8 +799,8 @@
 
 	hs_i2c5_bus: hs-i2c5-bus {
 		samsung,pins = "gpj1-1", "gpj1-0";
-		samsung,pin-function = <4>;
-		samsung,pin-pud = <3>;
-		samsung,pin-drv = <0>;
+		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
+		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
 	};
 };
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
       [not found]   ` <CGME20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973@epcas1p1.samsung.com>
@ 2016-12-30  4:14     ` Andi Shyti
       [not found]       ` <20161230041421.24448-5-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
  2017-01-06  6:49       ` Krzysztof Kozlowski
  0 siblings, 2 replies; 26+ messages in thread
From: Andi Shyti @ 2016-12-30  4:14 UTC (permalink / raw)
  To: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
	stable, Andi Shyti, Andi Shyti

Change the PIN() macro definition so that it can use the macros
from pinctrl/samsung.h header file.

Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  25 +-
 arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      | 254 ++++++++++-----------
 2 files changed, 133 insertions(+), 146 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 2af854b11644..d49879bd34bb 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -14,25 +14,12 @@
 
 #include <dt-bindings/pinctrl/samsung.h>
 
-#define PIN_PULL_NONE		0
-#define PIN_PULL_DOWN		1
-#define PIN_PULL_UP		3
-
-#define PIN_DRV_LV1		0
-#define PIN_DRV_LV2		2
-#define PIN_DRV_LV3		1
-#define PIN_DRV_LV4		3
-
-#define PIN_IN			0
-#define PIN_OUT			1
-#define PIN_FUNC1		2
-
-#define PIN(_func, _pin, _pull, _drv)			\
-	_pin {						\
-		samsung,pins = #_pin;			\
-		samsung,pin-function = <PIN_ ##_func>;	\
-		samsung,pin-pud = <PIN_PULL_ ##_pull>;	\
-		samsung,pin-drv = <PIN_DRV_ ##_drv>;	\
+#define PIN(_func, _pin, _pull, _drv)					\
+	_pin {								\
+		samsung,pins = #_pin;					\
+		samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>;	\
+		samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>;		\
+		samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>;		\
 	}
 
 &pinctrl_alive {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index f21bdc2ff834..66c4d5959881 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -742,77 +742,77 @@
 	pinctrl-0 = <&initial_alive>;
 
 	initial_alive: initial-state {
-		PIN(IN, gpa0-0, DOWN, LV1);
-		PIN(IN, gpa0-1, NONE, LV1);
-		PIN(IN, gpa0-2, DOWN, LV1);
-		PIN(IN, gpa0-3, NONE, LV1);
-		PIN(IN, gpa0-4, NONE, LV1);
-		PIN(IN, gpa0-5, DOWN, LV1);
-		PIN(IN, gpa0-6, NONE, LV1);
-		PIN(IN, gpa0-7, NONE, LV1);
-
-		PIN(IN, gpa1-0, UP, LV1);
-		PIN(IN, gpa1-1, NONE, LV1);
-		PIN(IN, gpa1-2, NONE, LV1);
-		PIN(IN, gpa1-3, DOWN, LV1);
-		PIN(IN, gpa1-4, DOWN, LV1);
-		PIN(IN, gpa1-5, NONE, LV1);
-		PIN(IN, gpa1-6, NONE, LV1);
-		PIN(IN, gpa1-7, NONE, LV1);
-
-		PIN(IN, gpa2-0, NONE, LV1);
-		PIN(IN, gpa2-1, NONE, LV1);
-		PIN(IN, gpa2-2, NONE, LV1);
-		PIN(IN, gpa2-3, DOWN, LV1);
-		PIN(IN, gpa2-4, NONE, LV1);
-		PIN(IN, gpa2-5, DOWN, LV1);
-		PIN(IN, gpa2-6, DOWN, LV1);
-		PIN(IN, gpa2-7, NONE, LV1);
-
-		PIN(IN, gpa3-0, DOWN, LV1);
-		PIN(IN, gpa3-1, DOWN, LV1);
-		PIN(IN, gpa3-2, NONE, LV1);
-		PIN(IN, gpa3-3, DOWN, LV1);
-		PIN(IN, gpa3-4, NONE, LV1);
-		PIN(IN, gpa3-5, DOWN, LV1);
-		PIN(IN, gpa3-6, DOWN, LV1);
-		PIN(IN, gpa3-7, DOWN, LV1);
-
-		PIN(IN, gpf1-0, NONE, LV1);
-		PIN(IN, gpf1-1, NONE, LV1);
-		PIN(IN, gpf1-2, DOWN, LV1);
-		PIN(IN, gpf1-4, UP, LV1);
-		PIN(OUT, gpf1-5, NONE, LV1);
-		PIN(IN, gpf1-6, DOWN, LV1);
-		PIN(IN, gpf1-7, DOWN, LV1);
-
-		PIN(IN, gpf2-0, DOWN, LV1);
-		PIN(IN, gpf2-1, DOWN, LV1);
-		PIN(IN, gpf2-2, DOWN, LV1);
-		PIN(IN, gpf2-3, DOWN, LV1);
-
-		PIN(IN, gpf3-0, DOWN, LV1);
-		PIN(IN, gpf3-1, DOWN, LV1);
-		PIN(IN, gpf3-2, NONE, LV1);
-		PIN(IN, gpf3-3, DOWN, LV1);
-
-		PIN(IN, gpf4-0, DOWN, LV1);
-		PIN(IN, gpf4-1, DOWN, LV1);
-		PIN(IN, gpf4-2, DOWN, LV1);
-		PIN(IN, gpf4-3, DOWN, LV1);
-		PIN(IN, gpf4-4, DOWN, LV1);
-		PIN(IN, gpf4-5, DOWN, LV1);
-		PIN(IN, gpf4-6, DOWN, LV1);
-		PIN(IN, gpf4-7, DOWN, LV1);
-
-		PIN(IN, gpf5-0, DOWN, LV1);
-		PIN(IN, gpf5-1, DOWN, LV1);
-		PIN(IN, gpf5-2, DOWN, LV1);
-		PIN(IN, gpf5-3, DOWN, LV1);
-		PIN(OUT, gpf5-4, NONE, LV1);
-		PIN(IN, gpf5-5, DOWN, LV1);
-		PIN(IN, gpf5-6, DOWN, LV1);
-		PIN(IN, gpf5-7, DOWN, LV1);
+		PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpa0-1, NONE, FAST_SR1);
+		PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpa0-3, NONE, FAST_SR1);
+		PIN(INPUT, gpa0-4, NONE, FAST_SR1);
+		PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpa0-6, NONE, FAST_SR1);
+		PIN(INPUT, gpa0-7, NONE, FAST_SR1);
+
+		PIN(INPUT, gpa1-0, UP, FAST_SR1);
+		PIN(INPUT, gpa1-1, NONE, FAST_SR1);
+		PIN(INPUT, gpa1-2, NONE, FAST_SR1);
+		PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
+		PIN(INPUT, gpa1-5, NONE, FAST_SR1);
+		PIN(INPUT, gpa1-6, NONE, FAST_SR1);
+		PIN(INPUT, gpa1-7, NONE, FAST_SR1);
+
+		PIN(INPUT, gpa2-0, NONE, FAST_SR1);
+		PIN(INPUT, gpa2-1, NONE, FAST_SR1);
+		PIN(INPUT, gpa2-2, NONE, FAST_SR1);
+		PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpa2-4, NONE, FAST_SR1);
+		PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpa2-7, NONE, FAST_SR1);
+
+		PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpa3-2, NONE, FAST_SR1);
+		PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpa3-4, NONE, FAST_SR1);
+		PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
+
+		PIN(INPUT, gpf1-0, NONE, FAST_SR1);
+		PIN(INPUT, gpf1-1, NONE, FAST_SR1);
+		PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpf1-4, UP, FAST_SR1);
+		PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
+		PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
+
+		PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
+
+		PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpf3-2, NONE, FAST_SR1);
+		PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
+
+		PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
+
+		PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
+		PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
+		PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
 	};
 
 	te_irq: te_irq {
@@ -826,8 +826,8 @@
 	pinctrl-0 = <&initial_cpif>;
 
 	initial_cpif: initial-state {
-		PIN(IN, gpv6-0, DOWN, LV1);
-		PIN(IN, gpv6-1, DOWN, LV1);
+		PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
 	};
 };
 
@@ -836,9 +836,9 @@
 	pinctrl-0 = <&initial_ese>;
 
 	initial_ese: initial-state {
-		PIN(IN, gpj2-0, DOWN, LV1);
-		PIN(IN, gpj2-1, DOWN, LV1);
-		PIN(IN, gpj2-2, DOWN, LV1);
+		PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
 	};
 };
 
@@ -847,11 +847,11 @@
 	pinctrl-0 = <&initial_fsys>;
 
 	initial_fsys: initial-state {
-		PIN(IN, gpr3-0, NONE, LV1);
-		PIN(IN, gpr3-1, DOWN, LV1);
-		PIN(IN, gpr3-2, DOWN, LV1);
-		PIN(IN, gpr3-3, DOWN, LV1);
-		PIN(IN, gpr3-7, NONE, LV1);
+		PIN(INPUT, gpr3-0, NONE, FAST_SR1);
+		PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpr3-7, NONE, FAST_SR1);
 	};
 };
 
@@ -860,14 +860,14 @@
 	pinctrl-0 = <&initial_imem>;
 
 	initial_imem: initial-state {
-		PIN(IN, gpf0-0, UP, LV1);
-		PIN(IN, gpf0-1, UP, LV1);
-		PIN(IN, gpf0-2, DOWN, LV1);
-		PIN(IN, gpf0-3, UP, LV1);
-		PIN(IN, gpf0-4, DOWN, LV1);
-		PIN(IN, gpf0-5, NONE, LV1);
-		PIN(IN, gpf0-6, DOWN, LV1);
-		PIN(IN, gpf0-7, UP, LV1);
+		PIN(INPUT, gpf0-0, UP, FAST_SR1);
+		PIN(INPUT, gpf0-1, UP, FAST_SR1);
+		PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpf0-3, UP, FAST_SR1);
+		PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
+		PIN(INPUT, gpf0-5, NONE, FAST_SR1);
+		PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
+		PIN(INPUT, gpf0-7, UP, FAST_SR1);
 	};
 };
 
@@ -876,7 +876,7 @@
 	pinctrl-0 = <&initial_nfc>;
 
 	initial_nfc: initial-state {
-		PIN(IN, gpj0-2, DOWN, LV1);
+		PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
 	};
 };
 
@@ -885,54 +885,54 @@
 	pinctrl-0 = <&initial_peric>;
 
 	initial_peric: initial-state {
-		PIN(IN, gpv7-0, DOWN, LV1);
-		PIN(IN, gpv7-1, DOWN, LV1);
-		PIN(IN, gpv7-2, NONE, LV1);
-		PIN(IN, gpv7-3, DOWN, LV1);
-		PIN(IN, gpv7-4, DOWN, LV1);
-		PIN(IN, gpv7-5, DOWN, LV1);
+		PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpv7-2, NONE, FAST_SR1);
+		PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
+		PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
 
-		PIN(IN, gpb0-4, DOWN, LV1);
+		PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
 
-		PIN(IN, gpc0-2, DOWN, LV1);
-		PIN(IN, gpc0-5, DOWN, LV1);
-		PIN(IN, gpc0-7, DOWN, LV1);
+		PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
 
-		PIN(IN, gpc1-1, DOWN, LV1);
+		PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
 
-		PIN(IN, gpc3-4, NONE, LV1);
-		PIN(IN, gpc3-5, NONE, LV1);
-		PIN(IN, gpc3-6, NONE, LV1);
-		PIN(IN, gpc3-7, NONE, LV1);
+		PIN(INPUT, gpc3-4, NONE, FAST_SR1);
+		PIN(INPUT, gpc3-5, NONE, FAST_SR1);
+		PIN(INPUT, gpc3-6, NONE, FAST_SR1);
+		PIN(INPUT, gpc3-7, NONE, FAST_SR1);
 
-		PIN(OUT, gpg0-0, NONE, LV1);
-		PIN(FUNC1, gpg0-1, DOWN, LV1);
+		PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
+		PIN(2, gpg0-1, DOWN, FAST_SR1);
 
-		PIN(IN, gpd2-5, DOWN, LV1);
+		PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
 
-		PIN(IN, gpd4-0, NONE, LV1);
-		PIN(IN, gpd4-1, DOWN, LV1);
-		PIN(IN, gpd4-2, DOWN, LV1);
-		PIN(IN, gpd4-3, DOWN, LV1);
-		PIN(IN, gpd4-4, DOWN, LV1);
+		PIN(INPUT, gpd4-0, NONE, FAST_SR1);
+		PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
 
-		PIN(IN, gpd6-3, DOWN, LV1);
+		PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
 
-		PIN(IN, gpd8-1, UP, LV1);
+		PIN(INPUT, gpd8-1, UP, FAST_SR1);
 
-		PIN(IN, gpg1-0, DOWN, LV1);
-		PIN(IN, gpg1-1, DOWN, LV1);
-		PIN(IN, gpg1-2, DOWN, LV1);
-		PIN(IN, gpg1-3, DOWN, LV1);
-		PIN(IN, gpg1-4, DOWN, LV1);
+		PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
+		PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
+		PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
 
-		PIN(IN, gpg2-0, DOWN, LV1);
-		PIN(IN, gpg2-1, DOWN, LV1);
+		PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
 
-		PIN(IN, gpg3-0, DOWN, LV1);
-		PIN(IN, gpg3-1, DOWN, LV1);
-		PIN(IN, gpg3-5, DOWN, LV1);
-		PIN(IN, gpg3-7, DOWN, LV1);
+		PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
+		PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
+		PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
+		PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
 	};
 };
 
@@ -941,7 +941,7 @@
 	pinctrl-0 = <&initial_touch>;
 
 	initial_touch: initial-state {
-		PIN(IN, gpj1-2, DOWN, LV1);
+		PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
 	};
 };
 
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
       [not found]       ` <20161230041421.24448-3-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2016-12-30  6:37         ` Chanwoo Choi
  2016-12-30 13:30         ` Linus Walleij
  1 sibling, 0 replies; 26+ messages in thread
From: Chanwoo Choi @ 2016-12-30  6:37 UTC (permalink / raw)
  To: Andi Shyti, Tomasz Figa, Krzysztof Kozlowski, Sylwester Nawrocki,
	Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
	Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	stable-u79uwXL29TY76Z2rM5mHXA, Andi Shyti

Hi Andi,

On 2016년 12월 30일 13:14, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
> 
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
> 
> Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  include/dt-bindings/pinctrl/samsung.h | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..e0ebb20ffdd3 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,20 @@
>  #define EXYNOS5420_PIN_DRV_LV3		2
>  #define EXYNOS5420_PIN_DRV_LV4		3
>  
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_FAST_SR1	0
> +#define EXYNOS5433_PIN_DRV_FAST_SR2	1
> +#define EXYNOS5433_PIN_DRV_FAST_SR3	2
> +#define EXYNOS5433_PIN_DRV_FAST_SR4	3
> +#define EXYNOS5433_PIN_DRV_FAST_SR5	4
> +#define EXYNOS5433_PIN_DRV_FAST_SR6	5
> +#define EXYNOS5433_PIN_DRV_SLOW_SR1	8
> +#define EXYNOS5433_PIN_DRV_SLOW_SR2	9
> +#define EXYNOS5433_PIN_DRV_SLOW_SR3	0xa
> +#define EXYNOS5433_PIN_DRV_SLOW_SR4	0xb
> +#define EXYNOS5433_PIN_DRV_SLOW_SR5	0xc
> +#define EXYNOS5433_PIN_DRV_SLOW_SR6	0xf
> +
>  #define EXYNOS_PIN_FUNC_INPUT		0
>  #define EXYNOS_PIN_FUNC_OUTPUT		1
>  #define EXYNOS_PIN_FUNC_2		2
> 

Looks good to me. ('SR' means "Slew Rate".)
Reviewed-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

-- 
Regards,
Chanwoo Choi
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
       [not found]       ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2016-12-30  6:38         ` Chanwoo Choi
  0 siblings, 0 replies; 26+ messages in thread
From: Chanwoo Choi @ 2016-12-30  6:38 UTC (permalink / raw)
  To: Andi Shyti, Tomasz Figa, Krzysztof Kozlowski, Sylwester Nawrocki,
	Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
	Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	stable-u79uwXL29TY76Z2rM5mHXA, Andi Shyti

Hi Andi,

Looks good to me.
Reviewed-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

Regards,
Chanwoo Choi

On 2016년 12월 30일 13:14, Andi Shyti wrote:
> Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> instead of hardcoded values.
> 
> Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
>  1 file changed, 175 insertions(+), 173 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index ad71247b074f..2af854b11644 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -12,6 +12,8 @@
>   * published by the Free Software Foundation.
>   */
>  
> +#include <dt-bindings/pinctrl/samsung.h>
> +
>  #define PIN_PULL_NONE		0
>  #define PIN_PULL_DOWN		1
>  #define PIN_PULL_UP		3
> @@ -145,23 +147,23 @@
>  	i2s0_bus: i2s0-bus {
>  		samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
>  				"gpz0-4", "gpz0-5", "gpz0-6";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pcm0_bus: pcm0-bus {
>  		samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	uart_aud_bus: uart-aud-bus {
>  		samsung,pins = "gpz1-3", "gpz1-2", "gpz1-1", "gpz1-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  };
>  
> @@ -196,16 +198,16 @@
>  
>  	spi2_bus: spi2-bus {
>  		samsung,pins = "gpd5-0", "gpd5-2", "gpd5-3";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c6_bus: hs-i2c6-bus {
>  		samsung,pins = "gpd5-3", "gpd5-2";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  };
>  
> @@ -260,141 +262,141 @@
>  
>  	sd0_clk: sd0-clk {
>  		samsung,pins = "gpr0-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_cmd: sd0-cmd {
>  		samsung,pins = "gpr0-1";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_rdqs: sd0-rdqs {
>  		samsung,pins = "gpr0-2";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_qrdy: sd0-qrdy {
>  		samsung,pins = "gpr0-3";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_bus1: sd0-bus-width1 {
>  		samsung,pins = "gpr1-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_bus4: sd0-bus-width4 {
>  		samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd0_bus8: sd0-bus-width8 {
>  		samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd1_clk: sd1-clk {
>  		samsung,pins = "gpr2-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd1_cmd: sd1-cmd {
>  		samsung,pins = "gpr2-1";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd1_bus1: sd1-bus-width1 {
>  		samsung,pins = "gpr3-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd1_bus4: sd1-bus-width4 {
>  		samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd1_bus8: sd1-bus-width8 {
>  		samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	pcie_bus: pcie_bus {
>  		samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
>  	};
>  
>  	sd2_clk: sd2-clk {
>  		samsung,pins = "gpr4-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd2_cmd: sd2-cmd {
>  		samsung,pins = "gpr4-1";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd2_cd: sd2-cd {
>  		samsung,pins = "gpr4-2";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd2_bus1: sd2-bus-width1 {
>  		samsung,pins = "gpr4-3";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd2_bus4: sd2-bus-width4 {
>  		samsung,pins = "gpr4-4", "gpr4-5", "gpr4-6";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <3>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
>  	};
>  
>  	sd2_clk_output: sd2-clk-output {
>  		samsung,pins = "gpr4-0";
> -		samsung,pin-function = <1>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <2>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
>  	};
>  
>  	sd2_cmd_output: sd2-cmd-output {
>  		samsung,pins = "gpr4-1";
> -		samsung,pin-function = <1>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <2>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR3>;
>  	};
>  };
>  
> @@ -419,9 +421,9 @@
>  
>  	hs_i2c4_bus: hs-i2c4-bus {
>  		samsung,pins = "gpj0-1", "gpj0-0";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  };
>  
> @@ -564,225 +566,225 @@
>  
>  	hs_i2c8_bus: hs-i2c8-bus {
>  		samsung,pins = "gpb0-1", "gpb0-0";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c9_bus: hs-i2c9-bus {
>  		samsung,pins = "gpb0-3", "gpb0-2";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	i2s1_bus: i2s1-bus {
>  		samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
>  				"gpd4-3", "gpd4-4";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pcm1_bus: pcm1-bus {
>  		samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2",
>  				"gpd4-3", "gpd4-4";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	spdif_bus: spdif-bus {
>  		samsung,pins = "gpd4-3", "gpd4-4";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <1>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_spi_pin0: fimc-is-spi-pin0 {
>  		samsung,pins = "gpc3-3", "gpc3-2", "gpc3-1", "gpc3-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_spi_pin1: fimc-is-spi-pin1 {
>  		samsung,pins = "gpc3-7", "gpc3-6", "gpc3-5", "gpc3-4";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	uart0_bus: uart0-bus {
>  		samsung,pins = "gpd0-3", "gpd0-2", "gpd0-1", "gpd0-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>  	};
>  
>  	hs_i2c2_bus: hs-i2c2-bus {
>  		samsung,pins = "gpd0-3", "gpd0-2";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	uart2_bus: uart2-bus {
>  		samsung,pins = "gpd1-5", "gpd1-4";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>  	};
>  
>  	uart1_bus: uart1-bus {
>  		samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
>  	};
>  
>  	hs_i2c3_bus: hs-i2c3-bus {
>  		samsung,pins = "gpd1-3", "gpd1-2";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c0_bus: hs-i2c0-bus {
>  		samsung,pins = "gpd2-1", "gpd2-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c1_bus: hs-i2c1-bus {
>  		samsung,pins = "gpd2-3", "gpd2-2";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pwm0_out: pwm0-out {
>  		samsung,pins = "gpd2-4";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pwm1_out: pwm1-out {
>  		samsung,pins = "gpd2-5";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pwm2_out: pwm2-out {
>  		samsung,pins = "gpd2-6";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	pwm3_out: pwm3-out {
>  		samsung,pins = "gpd2-7";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	spi1_bus: spi1-bus {
>  		samsung,pins = "gpd6-2", "gpd6-4", "gpd6-5";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c7_bus: hs-i2c7-bus {
>  		samsung,pins = "gpd2-7", "gpd2-6";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	spi0_bus: spi0-bus {
>  		samsung,pins = "gpd8-0", "gpd6-0", "gpd6-1";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c10_bus: hs-i2c10-bus {
>  		samsung,pins = "gpg3-1", "gpg3-0";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	hs_i2c11_bus: hs-i2c11-bus {
>  		samsung,pins = "gpg3-3", "gpg3-2";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	spi3_bus: spi3-bus {
>  		samsung,pins = "gpg3-4", "gpg3-6", "gpg3-7";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	spi4_bus: spi4-bus {
>  		samsung,pins = "gpv7-1", "gpv7-3", "gpv7-4";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_uart: fimc-is-uart {
>  		samsung,pins = "gpc1-1", "gpc0-7";
> -		samsung,pin-function = <3>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch0_i2c: fimc-is-ch0_i2c {
>  		samsung,pins = "gpc2-1", "gpc2-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch0_mclk: fimc-is-ch0_mclk {
>  		samsung,pins = "gpd7-0";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch1_i2c: fimc-is-ch1-i2c {
>  		samsung,pins = "gpc2-3", "gpc2-2";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch1_mclk: fimc-is-ch1-mclk {
>  		samsung,pins = "gpd7-1";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch2_i2c: fimc-is-ch2-i2c {
>  		samsung,pins = "gpc2-5", "gpc2-4";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  
>  	fimc_is_ch2_mclk: fimc-is-ch2-mclk {
>  		samsung,pins = "gpd7-2";
> -		samsung,pin-function = <2>;
> -		samsung,pin-pud = <0>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  };
>  
> @@ -797,8 +799,8 @@
>  
>  	hs_i2c5_bus: hs-i2c5-bus {
>  		samsung,pins = "gpj1-1", "gpj1-0";
> -		samsung,pin-function = <4>;
> -		samsung,pin-pud = <3>;
> -		samsung,pin-drv = <0>;
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
>  	};
>  };
> 
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
       [not found]       ` <20161230041421.24448-5-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2016-12-30  6:41         ` Chanwoo Choi
  0 siblings, 0 replies; 26+ messages in thread
From: Chanwoo Choi @ 2016-12-30  6:41 UTC (permalink / raw)
  To: Andi Shyti, Tomasz Figa, Krzysztof Kozlowski, Sylwester Nawrocki,
	Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
	Kukjin Kim, Javier Martinez Canillas, Linus Walleij
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	stable-u79uwXL29TY76Z2rM5mHXA, Andi Shyti

Hi Andi,

Looks good to me. I tested these patches for booting on TM2 board.
Reviewed-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

Regards,
Chanwoo Choi

On 2016년 12월 30일 13:14, Andi Shyti wrote:
> Change the PIN() macro definition so that it can use the macros
> from pinctrl/samsung.h header file.
> 
> Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  25 +-
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      | 254 ++++++++++-----------
>  2 files changed, 133 insertions(+), 146 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index 2af854b11644..d49879bd34bb 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -14,25 +14,12 @@
>  
>  #include <dt-bindings/pinctrl/samsung.h>
>  
> -#define PIN_PULL_NONE		0
> -#define PIN_PULL_DOWN		1
> -#define PIN_PULL_UP		3
> -
> -#define PIN_DRV_LV1		0
> -#define PIN_DRV_LV2		2
> -#define PIN_DRV_LV3		1
> -#define PIN_DRV_LV4		3
> -
> -#define PIN_IN			0
> -#define PIN_OUT			1
> -#define PIN_FUNC1		2
> -
> -#define PIN(_func, _pin, _pull, _drv)			\
> -	_pin {						\
> -		samsung,pins = #_pin;			\
> -		samsung,pin-function = <PIN_ ##_func>;	\
> -		samsung,pin-pud = <PIN_PULL_ ##_pull>;	\
> -		samsung,pin-drv = <PIN_DRV_ ##_drv>;	\
> +#define PIN(_func, _pin, _pull, _drv)					\
> +	_pin {								\
> +		samsung,pins = #_pin;					\
> +		samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>;	\
> +		samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>;		\
> +		samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>;		\
>  	}
>  
>  &pinctrl_alive {
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> index f21bdc2ff834..66c4d5959881 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
> @@ -742,77 +742,77 @@
>  	pinctrl-0 = <&initial_alive>;
>  
>  	initial_alive: initial-state {
> -		PIN(IN, gpa0-0, DOWN, LV1);
> -		PIN(IN, gpa0-1, NONE, LV1);
> -		PIN(IN, gpa0-2, DOWN, LV1);
> -		PIN(IN, gpa0-3, NONE, LV1);
> -		PIN(IN, gpa0-4, NONE, LV1);
> -		PIN(IN, gpa0-5, DOWN, LV1);
> -		PIN(IN, gpa0-6, NONE, LV1);
> -		PIN(IN, gpa0-7, NONE, LV1);
> -
> -		PIN(IN, gpa1-0, UP, LV1);
> -		PIN(IN, gpa1-1, NONE, LV1);
> -		PIN(IN, gpa1-2, NONE, LV1);
> -		PIN(IN, gpa1-3, DOWN, LV1);
> -		PIN(IN, gpa1-4, DOWN, LV1);
> -		PIN(IN, gpa1-5, NONE, LV1);
> -		PIN(IN, gpa1-6, NONE, LV1);
> -		PIN(IN, gpa1-7, NONE, LV1);
> -
> -		PIN(IN, gpa2-0, NONE, LV1);
> -		PIN(IN, gpa2-1, NONE, LV1);
> -		PIN(IN, gpa2-2, NONE, LV1);
> -		PIN(IN, gpa2-3, DOWN, LV1);
> -		PIN(IN, gpa2-4, NONE, LV1);
> -		PIN(IN, gpa2-5, DOWN, LV1);
> -		PIN(IN, gpa2-6, DOWN, LV1);
> -		PIN(IN, gpa2-7, NONE, LV1);
> -
> -		PIN(IN, gpa3-0, DOWN, LV1);
> -		PIN(IN, gpa3-1, DOWN, LV1);
> -		PIN(IN, gpa3-2, NONE, LV1);
> -		PIN(IN, gpa3-3, DOWN, LV1);
> -		PIN(IN, gpa3-4, NONE, LV1);
> -		PIN(IN, gpa3-5, DOWN, LV1);
> -		PIN(IN, gpa3-6, DOWN, LV1);
> -		PIN(IN, gpa3-7, DOWN, LV1);
> -
> -		PIN(IN, gpf1-0, NONE, LV1);
> -		PIN(IN, gpf1-1, NONE, LV1);
> -		PIN(IN, gpf1-2, DOWN, LV1);
> -		PIN(IN, gpf1-4, UP, LV1);
> -		PIN(OUT, gpf1-5, NONE, LV1);
> -		PIN(IN, gpf1-6, DOWN, LV1);
> -		PIN(IN, gpf1-7, DOWN, LV1);
> -
> -		PIN(IN, gpf2-0, DOWN, LV1);
> -		PIN(IN, gpf2-1, DOWN, LV1);
> -		PIN(IN, gpf2-2, DOWN, LV1);
> -		PIN(IN, gpf2-3, DOWN, LV1);
> -
> -		PIN(IN, gpf3-0, DOWN, LV1);
> -		PIN(IN, gpf3-1, DOWN, LV1);
> -		PIN(IN, gpf3-2, NONE, LV1);
> -		PIN(IN, gpf3-3, DOWN, LV1);
> -
> -		PIN(IN, gpf4-0, DOWN, LV1);
> -		PIN(IN, gpf4-1, DOWN, LV1);
> -		PIN(IN, gpf4-2, DOWN, LV1);
> -		PIN(IN, gpf4-3, DOWN, LV1);
> -		PIN(IN, gpf4-4, DOWN, LV1);
> -		PIN(IN, gpf4-5, DOWN, LV1);
> -		PIN(IN, gpf4-6, DOWN, LV1);
> -		PIN(IN, gpf4-7, DOWN, LV1);
> -
> -		PIN(IN, gpf5-0, DOWN, LV1);
> -		PIN(IN, gpf5-1, DOWN, LV1);
> -		PIN(IN, gpf5-2, DOWN, LV1);
> -		PIN(IN, gpf5-3, DOWN, LV1);
> -		PIN(OUT, gpf5-4, NONE, LV1);
> -		PIN(IN, gpf5-5, DOWN, LV1);
> -		PIN(IN, gpf5-6, DOWN, LV1);
> -		PIN(IN, gpf5-7, DOWN, LV1);
> +		PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa0-1, NONE, FAST_SR1);
> +		PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa0-3, NONE, FAST_SR1);
> +		PIN(INPUT, gpa0-4, NONE, FAST_SR1);
> +		PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa0-6, NONE, FAST_SR1);
> +		PIN(INPUT, gpa0-7, NONE, FAST_SR1);
> +
> +		PIN(INPUT, gpa1-0, UP, FAST_SR1);
> +		PIN(INPUT, gpa1-1, NONE, FAST_SR1);
> +		PIN(INPUT, gpa1-2, NONE, FAST_SR1);
> +		PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa1-5, NONE, FAST_SR1);
> +		PIN(INPUT, gpa1-6, NONE, FAST_SR1);
> +		PIN(INPUT, gpa1-7, NONE, FAST_SR1);
> +
> +		PIN(INPUT, gpa2-0, NONE, FAST_SR1);
> +		PIN(INPUT, gpa2-1, NONE, FAST_SR1);
> +		PIN(INPUT, gpa2-2, NONE, FAST_SR1);
> +		PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa2-4, NONE, FAST_SR1);
> +		PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa2-7, NONE, FAST_SR1);
> +
> +		PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa3-2, NONE, FAST_SR1);
> +		PIN(INPUT, gpa3-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa3-4, NONE, FAST_SR1);
> +		PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
> +
> +		PIN(INPUT, gpf1-0, NONE, FAST_SR1);
> +		PIN(INPUT, gpf1-1, NONE, FAST_SR1);
> +		PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf1-4, UP, FAST_SR1);
> +		PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
> +		PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
> +
> +		PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf2-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf2-3, DOWN, FAST_SR1);
> +
> +		PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf3-2, NONE, FAST_SR1);
> +		PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
> +
> +		PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
> +
> +		PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
> +		PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
> +		PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
>  	};
>  
>  	te_irq: te_irq {
> @@ -826,8 +826,8 @@
>  	pinctrl-0 = <&initial_cpif>;
>  
>  	initial_cpif: initial-state {
> -		PIN(IN, gpv6-0, DOWN, LV1);
> -		PIN(IN, gpv6-1, DOWN, LV1);
> +		PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
>  	};
>  };
>  
> @@ -836,9 +836,9 @@
>  	pinctrl-0 = <&initial_ese>;
>  
>  	initial_ese: initial-state {
> -		PIN(IN, gpj2-0, DOWN, LV1);
> -		PIN(IN, gpj2-1, DOWN, LV1);
> -		PIN(IN, gpj2-2, DOWN, LV1);
> +		PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
>  	};
>  };
>  
> @@ -847,11 +847,11 @@
>  	pinctrl-0 = <&initial_fsys>;
>  
>  	initial_fsys: initial-state {
> -		PIN(IN, gpr3-0, NONE, LV1);
> -		PIN(IN, gpr3-1, DOWN, LV1);
> -		PIN(IN, gpr3-2, DOWN, LV1);
> -		PIN(IN, gpr3-3, DOWN, LV1);
> -		PIN(IN, gpr3-7, NONE, LV1);
> +		PIN(INPUT, gpr3-0, NONE, FAST_SR1);
> +		PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpr3-7, NONE, FAST_SR1);
>  	};
>  };
>  
> @@ -860,14 +860,14 @@
>  	pinctrl-0 = <&initial_imem>;
>  
>  	initial_imem: initial-state {
> -		PIN(IN, gpf0-0, UP, LV1);
> -		PIN(IN, gpf0-1, UP, LV1);
> -		PIN(IN, gpf0-2, DOWN, LV1);
> -		PIN(IN, gpf0-3, UP, LV1);
> -		PIN(IN, gpf0-4, DOWN, LV1);
> -		PIN(IN, gpf0-5, NONE, LV1);
> -		PIN(IN, gpf0-6, DOWN, LV1);
> -		PIN(IN, gpf0-7, UP, LV1);
> +		PIN(INPUT, gpf0-0, UP, FAST_SR1);
> +		PIN(INPUT, gpf0-1, UP, FAST_SR1);
> +		PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf0-3, UP, FAST_SR1);
> +		PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf0-5, NONE, FAST_SR1);
> +		PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
> +		PIN(INPUT, gpf0-7, UP, FAST_SR1);
>  	};
>  };
>  
> @@ -876,7 +876,7 @@
>  	pinctrl-0 = <&initial_nfc>;
>  
>  	initial_nfc: initial-state {
> -		PIN(IN, gpj0-2, DOWN, LV1);
> +		PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
>  	};
>  };
>  
> @@ -885,54 +885,54 @@
>  	pinctrl-0 = <&initial_peric>;
>  
>  	initial_peric: initial-state {
> -		PIN(IN, gpv7-0, DOWN, LV1);
> -		PIN(IN, gpv7-1, DOWN, LV1);
> -		PIN(IN, gpv7-2, NONE, LV1);
> -		PIN(IN, gpv7-3, DOWN, LV1);
> -		PIN(IN, gpv7-4, DOWN, LV1);
> -		PIN(IN, gpv7-5, DOWN, LV1);
> +		PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpv7-2, NONE, FAST_SR1);
> +		PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
> +		PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpb0-4, DOWN, LV1);
> +		PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpc0-2, DOWN, LV1);
> -		PIN(IN, gpc0-5, DOWN, LV1);
> -		PIN(IN, gpc0-7, DOWN, LV1);
> +		PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpc1-1, DOWN, LV1);
> +		PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpc3-4, NONE, LV1);
> -		PIN(IN, gpc3-5, NONE, LV1);
> -		PIN(IN, gpc3-6, NONE, LV1);
> -		PIN(IN, gpc3-7, NONE, LV1);
> +		PIN(INPUT, gpc3-4, NONE, FAST_SR1);
> +		PIN(INPUT, gpc3-5, NONE, FAST_SR1);
> +		PIN(INPUT, gpc3-6, NONE, FAST_SR1);
> +		PIN(INPUT, gpc3-7, NONE, FAST_SR1);
>  
> -		PIN(OUT, gpg0-0, NONE, LV1);
> -		PIN(FUNC1, gpg0-1, DOWN, LV1);
> +		PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
> +		PIN(2, gpg0-1, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpd2-5, DOWN, LV1);
> +		PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpd4-0, NONE, LV1);
> -		PIN(IN, gpd4-1, DOWN, LV1);
> -		PIN(IN, gpd4-2, DOWN, LV1);
> -		PIN(IN, gpd4-3, DOWN, LV1);
> -		PIN(IN, gpd4-4, DOWN, LV1);
> +		PIN(INPUT, gpd4-0, NONE, FAST_SR1);
> +		PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpd6-3, DOWN, LV1);
> +		PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpd8-1, UP, LV1);
> +		PIN(INPUT, gpd8-1, UP, FAST_SR1);
>  
> -		PIN(IN, gpg1-0, DOWN, LV1);
> -		PIN(IN, gpg1-1, DOWN, LV1);
> -		PIN(IN, gpg1-2, DOWN, LV1);
> -		PIN(IN, gpg1-3, DOWN, LV1);
> -		PIN(IN, gpg1-4, DOWN, LV1);
> +		PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpg2-0, DOWN, LV1);
> -		PIN(IN, gpg2-1, DOWN, LV1);
> +		PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
>  
> -		PIN(IN, gpg3-0, DOWN, LV1);
> -		PIN(IN, gpg3-1, DOWN, LV1);
> -		PIN(IN, gpg3-5, DOWN, LV1);
> -		PIN(IN, gpg3-7, DOWN, LV1);
> +		PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
> +		PIN(INPUT, gpg3-7, DOWN, FAST_SR1);
>  	};
>  };
>  
> @@ -941,7 +941,7 @@
>  	pinctrl-0 = <&initial_touch>;
>  
>  	initial_touch: initial-state {
> -		PIN(IN, gpj1-2, DOWN, LV1);
> +		PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
>  	};
>  };
>  
> 

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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
  2016-12-30  4:14       ` [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433 Andi Shyti
@ 2016-12-30 13:28         ` Linus Walleij
       [not found]           ` <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  2017-02-24  0:22           ` Chanwoo Choi
  0 siblings, 2 replies; 26+ messages in thread
From: Linus Walleij @ 2016-12-30 13:28 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:

> From: Chanwoo Choi <cw00.choi@samsung.com>
>
> This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
> because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
> registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
>
> Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
> Cc: stable@vger.kernel.org
> Cc: Tomasz Figa <tomasz.figa@gmail.com>
> Cc: Krzysztof Kozlowski <krzk@kernel.org>
> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Kukjin Kim <kgene@kernel.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

Nominally I think you should sign this off too Andi, as you are in the delivery
path.

Patch applied for fixes.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
       [not found]       ` <20161230041421.24448-3-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
  2016-12-30  6:37         ` Chanwoo Choi
@ 2016-12-30 13:30         ` Linus Walleij
  2017-01-06  6:48           ` Krzysztof Kozlowski
  1 sibling, 1 reply; 26+ messages in thread
From: Linus Walleij @ 2016-12-30 13:30 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc, linux-kernel-u79uwXL29TY76Z2rM5mHXA, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:

> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

Patch applied with Chanwoo's review tag.

Yours,
Linus Walleij
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To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2016-12-30  4:14     ` [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433 Andi Shyti
       [not found]       ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2016-12-30 13:32       ` Linus Walleij
  2016-12-30 15:17         ` Krzysztof Kozlowski
  2016-12-30 20:28         ` Andi Shyti
  2017-01-06  6:48       ` Krzysztof Kozlowski
  2 siblings, 2 replies; 26+ messages in thread
From: Linus Walleij @ 2016-12-30 13:32 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:

> Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> instead of hardcoded values.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>

These look fine, but that this and the other DTS patch through ARM SoC.

If you also need the headerfile patch (patch 2) to go through ARM SoC
that is fine,
I can take it out of pinctrl if you want.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
       [not found]           ` <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2016-12-30 15:09             ` Krzysztof Kozlowski
  2017-01-03  9:45               ` Andi Shyti
  0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2016-12-30 15:09 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Andi Shyti, Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc, linux-kernel-u79uwXL29TY76Z2rM5mHXA, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 02:28:52PM +0100, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> 
> > From: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> >
> > This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
> > because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
> > registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
> >
> > Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
> > Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > Cc: Tomasz Figa <tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > Cc: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> > Cc: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > Cc: Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > Cc: Javier Martinez Canillas <javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
> > Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> 
> Nominally I think you should sign this off too Andi, as you are in the delivery
> path.
> 
> Patch applied for fixes.

That has to be signed by Andi... otherwise the chain is broken (and
there could be changes added inside).

Best regards,
Krzysztof
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2016-12-30 13:32       ` Linus Walleij
@ 2016-12-30 15:17         ` Krzysztof Kozlowski
  2017-01-03  8:24           ` Linus Walleij
  2016-12-30 20:28         ` Andi Shyti
  1 sibling, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2016-12-30 15:17 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Andi Shyti, Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 02:32:39PM +0100, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
> 
> > Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> > instead of hardcoded values.
> >
> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> 
> These look fine, but that this and the other DTS patch through ARM SoC.
> 
> If you also need the headerfile patch (patch 2) to go through ARM SoC
> that is fine,
> I can take it out of pinctrl if you want.

Yes, I need the header. It would be much appreciated if you could
provide a tag or stable branch with it.

BTW, Andi, please follow the subject prefix convention (git log
--oneline arch/arm64/boot/dts/exynos).

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2016-12-30 13:32       ` Linus Walleij
  2016-12-30 15:17         ` Krzysztof Kozlowski
@ 2016-12-30 20:28         ` Andi Shyti
  1 sibling, 0 replies; 26+ messages in thread
From: Andi Shyti @ 2016-12-30 20:28 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Andi Shyti, Chanwoo Choi, Tomasz Figa, Krzysztof Kozlowski,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

Hi Linus,

> > Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> > instead of hardcoded values.
> >
> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> 
> These look fine, but that this and the other DTS patch through ARM SoC.
> 
> If you also need the headerfile patch (patch 2) to go through ARM SoC
> that is fine,
> I can take it out of pinctrl if you want.

yes, sure... no problem from my side :)

Thanks,
Andi

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2016-12-30 15:17         ` Krzysztof Kozlowski
@ 2017-01-03  8:24           ` Linus Walleij
  2017-01-05 20:08             ` Krzysztof Kozlowski
  0 siblings, 1 reply; 26+ messages in thread
From: Linus Walleij @ 2017-01-03  8:24 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Andi Shyti, Chanwoo Choi, Tomasz Figa, Sylwester Nawrocki,
	Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
	Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Fri, Dec 30, 2016 at 4:17 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Fri, Dec 30, 2016 at 02:32:39PM +0100, Linus Walleij wrote:
>> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
>>
>> > Use the macros defined in include/dt-bindings/pinctrl/samsung.h
>> > instead of hardcoded values.
>> >
>> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>>
>> These look fine, but that this and the other DTS patch through ARM SoC.
>>
>> If you also need the headerfile patch (patch 2) to go through ARM SoC
>> that is fine,
>> I can take it out of pinctrl if you want.
>
> Yes, I need the header. It would be much appreciated if you could
> provide a tag or stable branch with it.

Nah better just merge that patch into the ARM SoC tree only.

Acked-by: Linus Walleij <linus.walleij@linaro.org>

I'll remove it from the pinctrl tree.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
  2016-12-30 15:09             ` Krzysztof Kozlowski
@ 2017-01-03  9:45               ` Andi Shyti
  0 siblings, 0 replies; 26+ messages in thread
From: Andi Shyti @ 2017-01-03  9:45 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Linus Walleij, Chanwoo Choi, Tomasz Figa, Sylwester Nawrocki,
	Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
	Kukjin Kim, Javier Martinez Canillas,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc, linux-kernel-u79uwXL29TY76Z2rM5mHXA, stable,
	Andi Shyti

Hi Linus and Krzysztof,

> > > From: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> > >
> > > This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
> > > because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
> > > registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
> > >
> > > Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
> > > Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > > Cc: Tomasz Figa <tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > Cc: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> > > Cc: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > > Cc: Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > Cc: Javier Martinez Canillas <javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
> > > Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> > 
> > Nominally I think you should sign this off too Andi, as you are in the delivery
> > path.
> > 
> > Patch applied for fixes.
> 
> That has to be signed by Andi... otherwise the chain is broken (and
> there could be changes added inside).

yes, sorry about this. If Linus wants and it's not too late, he
can add my signed off at the bottom.

Thanks,
Andi
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2017-01-03  8:24           ` Linus Walleij
@ 2017-01-05 20:08             ` Krzysztof Kozlowski
  2017-01-06  2:23               ` Andi Shyti
  0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-05 20:08 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Kukjin Kim,
	Javier Martinez Canillas, Catalin Marinas, Will Deacon,
	Tomasz Figa, Andi Shyti, linux-kernel, Chanwoo Choi, Rob Herring,
	Krzysztof Kozlowski, Sylwester Nawrocki, stable, Andi Shyti,
	linux-arm-kernel

On Tue, Jan 03, 2017 at 09:24:34AM +0100, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 4:17 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > On Fri, Dec 30, 2016 at 02:32:39PM +0100, Linus Walleij wrote:
> >> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
> >>
> >> > Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> >> > instead of hardcoded values.
> >> >
> >> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> >>
> >> These look fine, but that this and the other DTS patch through ARM SoC.
> >>
> >> If you also need the headerfile patch (patch 2) to go through ARM SoC
> >> that is fine,
> >> I can take it out of pinctrl if you want.
> >
> > Yes, I need the header. It would be much appreciated if you could
> > provide a tag or stable branch with it.
> 
> Nah better just merge that patch into the ARM SoC tree only.
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> I'll remove it from the pinctrl tree.

Thanks, I see it being dropped.

Andi,
Please fix missing Signed-off-by and resend with Linus' tags for #1 and
#2 and with other accumulated tags.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2017-01-05 20:08             ` Krzysztof Kozlowski
@ 2017-01-06  2:23               ` Andi Shyti
  2017-01-06  6:18                 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 26+ messages in thread
From: Andi Shyti @ 2017-01-06  2:23 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
	Javier Martinez Canillas, Catalin Marinas, Linus Walleij,
	Will Deacon, Tomasz Figa, stable, linux-kernel, Chanwoo Choi,
	Rob Herring, Kukjin Kim, Sylwester Nawrocki, linux-arm-kernel

Hi Krzysztof,

> Andi,
> Please fix missing Signed-off-by and resend with Linus' tags for #1 and
> #2 and with other accumulated tags.

patch #1 has already been merged in mainline:

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=1259feddd0f83649d5c48d730c140b4f7f3fa288

and patch #2 is in LinusW's -next branch.

does it still make sense to send them again? If you want I can
send again patch 3 and 4 as independent patches with Chanwoo's
review (the only tags).

Thanks,
Andi

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2017-01-06  2:23               ` Andi Shyti
@ 2017-01-06  6:18                 ` Krzysztof Kozlowski
  0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-06  6:18 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Krzysztof Kozlowski, Linus Walleij, Chanwoo Choi, Tomasz Figa,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Fri, Jan 06, 2017 at 11:23:43AM +0900, Andi Shyti wrote:
> Hi Krzysztof,
> 
> > Andi,
> > Please fix missing Signed-off-by and resend with Linus' tags for #1 and
> > #2 and with other accumulated tags.
> 
> patch #1 has already been merged in mainline:
> 
> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=1259feddd0f83649d5c48d730c140b4f7f3fa288
> 
> and patch #2 is in LinusW's -next branch.

Yes, but it is gone from devel so I suppose it will be removed from
for-next in the future as well.

> does it still make sense to send them again? If you want I can
> send again patch 3 and 4 as independent patches with Chanwoo's
> review (the only tags).

No, no need. I wanted resend only because of #1 but it is merged as you
said.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
  2016-12-30 13:30         ` Linus Walleij
@ 2017-01-06  6:48           ` Krzysztof Kozlowski
  0 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-06  6:48 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Kukjin Kim,
	Javier Martinez Canillas, Catalin Marinas, Will Deacon,
	Tomasz Figa, Krzysztof Kozlowski, linux-kernel, Chanwoo Choi,
	Rob Herring, Andi Shyti, Sylwester Nawrocki, stable, Andi Shyti,
	linux-arm-kernel

On Fri, Dec 30, 2016 at 02:30:47PM +0100, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
> 
> > Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> > values used for configuration") has added a header file for defining the
> > pinctrl values in order to avoid hardcoded settings in the Exynos
> > DTS related files.
> >
> > Extend samsung.h to the Exynos5433 for drive strength values
> > which are strictly related to the particular SoC and may defer
> > from others.
> >
> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> 
> Patch applied with Chanwoo's review tag.

As agreed, applied with your ack to samsung-soc. I put it on separate
branch so I can provide a tag if needed.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
  2016-12-30  4:14     ` [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433 Andi Shyti
       [not found]       ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
  2016-12-30 13:32       ` Linus Walleij
@ 2017-01-06  6:48       ` Krzysztof Kozlowski
  2 siblings, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-06  6:48 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
	Javier Martinez Canillas, Catalin Marinas, Linus Walleij,
	Will Deacon, Tomasz Figa, Krzysztof Kozlowski, linux-kernel,
	Chanwoo Choi, Rob Herring, Kukjin Kim, Sylwester Nawrocki,
	stable, linux-arm-kernel

On Fri, Dec 30, 2016 at 01:14:20PM +0900, Andi Shyti wrote:
> Use the macros defined in include/dt-bindings/pinctrl/samsung.h
> instead of hardcoded values.
> 
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 348 +++++++++++----------
>  1 file changed, 175 insertions(+), 173 deletions(-)
> 

Thanks, applied.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention
  2016-12-30  4:14     ` [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention Andi Shyti
       [not found]       ` <20161230041421.24448-5-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2017-01-06  6:49       ` Krzysztof Kozlowski
  1 sibling, 0 replies; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-06  6:49 UTC (permalink / raw)
  To: Andi Shyti
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
	Javier Martinez Canillas, Catalin Marinas, Linus Walleij,
	Will Deacon, Tomasz Figa, Krzysztof Kozlowski, linux-kernel,
	Chanwoo Choi, Rob Herring, Kukjin Kim, Sylwester Nawrocki,
	stable, linux-arm-kernel

On Fri, Dec 30, 2016 at 01:14:21PM +0900, Andi Shyti wrote:
> Change the PIN() macro definition so that it can use the macros
> from pinctrl/samsung.h header file.
> 
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi |  25 +-
>  arch/arm64/boot/dts/exynos/exynos5433-tm2.dts      | 254 ++++++++++-----------
>  2 files changed, 133 insertions(+), 146 deletions(-)
> 

Thanks, applied (here and in 3/4 with fixed subject).

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
  2016-12-30 13:28         ` Linus Walleij
       [not found]           ` <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2017-02-24  0:22           ` Chanwoo Choi
       [not found]             ` <58AF7CCB.5070303-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
  1 sibling, 1 reply; 26+ messages in thread
From: Chanwoo Choi @ 2017-02-24  0:22 UTC (permalink / raw)
  To: Linus Walleij, Andi Shyti
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
	Catalin Marinas, Will Deacon, Tomasz Figa, Krzysztof Kozlowski,
	linux-kernel, Javier Martinez Canillas, Rob Herring, Kukjin Kim,
	Sylwester Nawrocki, stable, linux-arm-kernel

Hi Linus,

On 2016년 12월 30일 22:28, Linus Walleij wrote:
> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
> 
>> From: Chanwoo Choi <cw00.choi@samsung.com>
>>
>> This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
>> because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
>> registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
>>
>> Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
>> Cc: stable@vger.kernel.org
>> Cc: Tomasz Figa <tomasz.figa@gmail.com>
>> Cc: Krzysztof Kozlowski <krzk@kernel.org>
>> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Cc: Kukjin Kim <kgene@kernel.org>
>> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> 
> Nominally I think you should sign this off too Andi, as you are in the delivery
> path.
> 
> Patch applied for fixes.

This patch was already merged on your git and then merge it on tovalds's git[1].
But, when I checked the latest drivers/pinctrl/samsung/pinctrl-exynos.c,
it doesn't contain the all codes of patch[1].
Maybe, I think that there was some merge conflict[2]. 

[1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/pinctrl/samsung/pinctrl-exynos.c?id=1259feddd0f83649d5c48d730c140b4f7f3fa288
[2] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/drivers/pinctrl/samsung/pinctrl-exynos.c?id=7f36f5d11cda050b118f76d774151427a18d15ef

So, How can we fix it? If you want to resend the new patch, I'll do.
To help you understand, I just added the diff on the below.

Best Regards,
Chanwoo Choi


diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index f9b49967f512..63e51b56a22a 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1468,82 +1468,82 @@ static void exynos_retention_disable(struct samsung_pinctrl_drv_data *drvdata)
 
 /* pin banks of exynos5433 pin-controller - ALIVE */
 static const struct samsung_pin_bank_data exynos5433_pin_banks0[] __initconst = {
-       EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
-       EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
-       EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
-       EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
-       EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
-       EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
-       EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
-       EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
-       EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
+       EXYNOS5433_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+       EXYNOS5433_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+       EXYNOS5433_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+       EXYNOS5433_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+       EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
+       EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
+       EXYNOS5433_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
+       EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
+       EXYNOS5433_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
 };
 
 /* pin banks of exynos5433 pin-controller - AUD */
 static const struct samsung_pin_bank_data exynos5433_pin_banks1[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
-       EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
+       EXYNOS5433_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
 };
 
 /* pin banks of exynos5433 pin-controller - CPIF */
 static const struct samsung_pin_bank_data exynos5433_pin_banks2[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x000, "gpv6", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - eSE */
 static const struct samsung_pin_bank_data exynos5433_pin_banks3[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj2", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - FINGER */
 static const struct samsung_pin_bank_data exynos5433_pin_banks4[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(4, 0x000, "gpd5", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - FSYS */
 static const struct samsung_pin_bank_data exynos5433_pin_banks5[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
-       EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
-       EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
-       EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
-       EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
-       EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
+       EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gph1", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(7, 0x020, "gpr4", 0x04),
+       EXYNOS5433_PIN_BANK_EINTG(5, 0x040, "gpr0", 0x08),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x060, "gpr1", 0x0c),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x080, "gpr2", 0x10),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpr3", 0x14),
 };
 
 /* pin banks of exynos5433 pin-controller - IMEM */
 static const struct samsung_pin_bank_data exynos5433_pin_banks6[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - NFC */
 static const struct samsung_pin_bank_data exynos5433_pin_banks7[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
 };
 
 /* pin banks of exynos5433 pin-controller - PERIC */
 static const struct samsung_pin_bank_data exynos5433_pin_banks8[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
-       EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
-       EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
-       EXYNOS_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
-       EXYNOS_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
-       EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
-       EXYNOS_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
-       EXYNOS_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
-       EXYNOS_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
-       EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
-       EXYNOS_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
-       EXYNOS_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
-       EXYNOS_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
-       EXYNOS_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
-       EXYNOS_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
-       EXYNOS_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
-       EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
+       EXYNOS5433_PIN_BANK_EINTG(6, 0x000, "gpv7", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(5, 0x020, "gpb0", 0x04),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x040, "gpc0", 0x08),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x060, "gpc1", 0x0c),
+       EXYNOS5433_PIN_BANK_EINTG(6, 0x080, "gpc2", 0x10),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x0a0, "gpc3", 0x14),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x0c0, "gpg0", 0x18),
+       EXYNOS5433_PIN_BANK_EINTG(4, 0x0e0, "gpd0", 0x1c),
+       EXYNOS5433_PIN_BANK_EINTG(6, 0x100, "gpd1", 0x20),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x120, "gpd2", 0x24),
+       EXYNOS5433_PIN_BANK_EINTG(5, 0x140, "gpd4", 0x28),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x160, "gpd8", 0x2c),
+       EXYNOS5433_PIN_BANK_EINTG(7, 0x180, "gpd6", 0x30),
+       EXYNOS5433_PIN_BANK_EINTG(3, 0x1a0, "gpd7", 0x34),
+       EXYNOS5433_PIN_BANK_EINTG(5, 0x1c0, "gpg1", 0x38),
+       EXYNOS5433_PIN_BANK_EINTG(2, 0x1e0, "gpg2", 0x3c),
+       EXYNOS5433_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40),
 };
 
 /* pin banks of exynos5433 pin-controller - TOUCH */
 static const struct samsung_pin_bank_data exynos5433_pin_banks9[] __initconst = {
-       EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+       EXYNOS5433_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
 };
 
 /*



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^ permalink raw reply related	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
       [not found]             ` <58AF7CCB.5070303-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2017-03-14 13:47               ` Linus Walleij
  2017-03-14 14:27                 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 26+ messages in thread
From: Linus Walleij @ 2017-03-14 13:47 UTC (permalink / raw)
  To: Chanwoo Choi, Marek Szyprowski, Krzysztof Kozlowski
  Cc: Andi Shyti, Tomasz Figa, Sylwester Nawrocki, Rob Herring,
	Mark Rutland, Catalin Marinas, Will Deacon, Kukjin Kim,
	Javier Martinez Canillas, devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-samsung-soc, linux-kernel-u79uwXL29TY76Z2rM5mHXA, stable,
	Andi Shyti

On Fri, Feb 24, 2017 at 1:22 AM, Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> On 2016년 12월 30일 22:28, Linus Walleij wrote:
>> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
>>
>>> From: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>>
>>> This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
>>> because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
>>> registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
>>>
>>> Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
>>> Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>>> Cc: Tomasz Figa <tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>> Cc: Krzysztof Kozlowski <krzk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>>> Cc: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>> Cc: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>>> Cc: Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>>> Cc: Javier Martinez Canillas <javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
>>> Signed-off-by: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
>>
>> Nominally I think you should sign this off too Andi, as you are in the delivery
>> path.
>>
>> Patch applied for fixes.
>
> This patch was already merged on your git and then merge it on tovalds's git[1].
> But, when I checked the latest drivers/pinctrl/samsung/pinctrl-exynos.c,
> it doesn't contain the all codes of patch[1].
> Maybe, I think that there was some merge conflict[2].

Probably. Send a patch fixing it up so I can apply it.

There are now something like 5 different people submitting Samsung pinctrl
patches without coordination so this will start to happen a lot if you keep
up this development pace.

As I just wrote in another mail: I want someone to step up and collect
Samsung patches and send them to me using a pull request.

Samsung people also need to start reviewing each other's patches
more I guess, but mainly I need help with integration.

Yours,
Linus Walleij
--
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^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
  2017-03-14 13:47               ` Linus Walleij
@ 2017-03-14 14:27                 ` Krzysztof Kozlowski
  2017-03-15 13:52                   ` Linus Walleij
  0 siblings, 1 reply; 26+ messages in thread
From: Krzysztof Kozlowski @ 2017-03-14 14:27 UTC (permalink / raw)
  To: Linus Walleij
  Cc: Chanwoo Choi, Marek Szyprowski, Andi Shyti, Tomasz Figa,
	Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
	Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
	linux-arm-kernel, linux-samsung-soc, linux-kernel, stable,
	Andi Shyti

On Tue, Mar 14, 2017 at 3:47 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Feb 24, 2017 at 1:22 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>> On 2016년 12월 30일 22:28, Linus Walleij wrote:
>>> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
> Probably. Send a patch fixing it up so I can apply it.
>
> There are now something like 5 different people submitting Samsung pinctrl
> patches without coordination so this will start to happen a lot if you keep
> up this development pace.
>
> As I just wrote in another mail: I want someone to step up and collect
> Samsung patches and send them to me using a pull request.

I think we can handle it as there are three of us.

> Samsung people also need to start reviewing each other's patches
> more I guess, but mainly I need help with integration.

More or less recently we do the reviews. Sure we can focus more... and
actually having an entry gate for patches would ensure at least one
more review from the applying person.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 26+ messages in thread

* Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433
  2017-03-14 14:27                 ` Krzysztof Kozlowski
@ 2017-03-15 13:52                   ` Linus Walleij
  0 siblings, 0 replies; 26+ messages in thread
From: Linus Walleij @ 2017-03-15 13:52 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Charles Keepax
  Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
	Javier Martinez Canillas, Catalin Marinas, Will Deacon,
	Tomasz Figa, Andi Shyti, linux-kernel, Chanwoo Choi, Rob Herring,
	Kukjin Kim, Sylwester Nawrocki, stable, linux-arm-kernel,
	Marek Szyprowski

On Tue, Mar 14, 2017 at 3:27 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Tue, Mar 14, 2017 at 3:47 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
>> On Fri, Feb 24, 2017 at 1:22 AM, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>>> On 2016년 12월 30일 22:28, Linus Walleij wrote:
>>>> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
>> Probably. Send a patch fixing it up so I can apply it.
>>
>> There are now something like 5 different people submitting Samsung pinctrl
>> patches without coordination so this will start to happen a lot if you keep
>> up this development pace.
>>
>> As I just wrote in another mail: I want someone to step up and collect
>> Samsung patches and send them to me using a pull request.
>
> I think we can handle it as there are three of us.

I just this week started to get patches from Charles Keepax, and I
understand that Wolfson Micro has a bunch of Samsung platform
work going on.

So now it is getting a bit much.

>> Samsung people also need to start reviewing each other's patches
>> more I guess, but mainly I need help with integration.
>
> More or less recently we do the reviews. Sure we can focus more... and
> actually having an entry gate for patches would ensure at least one
> more review from the applying person.

Interested in the job? ;)

I got pull requests from you before so I know you are familiar
with the process.

I would very much appreciate it if all Samsung pin control patches
were queued by you and sent to me with pull requests based on my
"devel" or "fixes" branch. If there is going to be a lot of it anyways.

Maybe last merge window was a bit special since Marek did all this
grunt work of switching S5P & friends over to pin control, in that
case it is not such a big issue.

Yours,
Linus Walleij

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 26+ messages in thread

end of thread, other threads:[~2017-03-15 13:52 UTC | newest]

Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <CGME20161230041426epcas1p1a8564e969a8f6a1746a3af9b26aac99f@epcas1p1.samsung.com>
2016-12-30  4:14 ` [PATCH v2 0/4] Use Exynos macros for pinctrl settings Andi Shyti
     [not found]   ` <CGME20161230041426epcas1p1f827d3cee8b607d81e9921b412ddf301@epcas1p1.samsung.com>
     [not found]     ` <20161230041421.24448-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30  4:14       ` [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV bitfields for Exynos5433 Andi Shyti
2016-12-30 13:28         ` Linus Walleij
     [not found]           ` <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-12-30 15:09             ` Krzysztof Kozlowski
2017-01-03  9:45               ` Andi Shyti
2017-02-24  0:22           ` Chanwoo Choi
     [not found]             ` <58AF7CCB.5070303-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-03-14 13:47               ` Linus Walleij
2017-03-14 14:27                 ` Krzysztof Kozlowski
2017-03-15 13:52                   ` Linus Walleij
     [not found]   ` <CGME20161230041427epcas1p1e4d0dd5e7f9928664c664b7850dbd87a@epcas1p1.samsung.com>
2016-12-30  4:14     ` [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros " Andi Shyti
     [not found]       ` <20161230041421.24448-3-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30  6:37         ` Chanwoo Choi
2016-12-30 13:30         ` Linus Walleij
2017-01-06  6:48           ` Krzysztof Kozlowski
     [not found]   ` <CGME20161230041427epcas1p1151d6e28fac143c63efaf4f7c8ed432d@epcas1p1.samsung.com>
2016-12-30  4:14     ` [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433 Andi Shyti
     [not found]       ` <20161230041421.24448-4-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30  6:38         ` Chanwoo Choi
2016-12-30 13:32       ` Linus Walleij
2016-12-30 15:17         ` Krzysztof Kozlowski
2017-01-03  8:24           ` Linus Walleij
2017-01-05 20:08             ` Krzysztof Kozlowski
2017-01-06  2:23               ` Andi Shyti
2017-01-06  6:18                 ` Krzysztof Kozlowski
2016-12-30 20:28         ` Andi Shyti
2017-01-06  6:48       ` Krzysztof Kozlowski
     [not found]   ` <CGME20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973@epcas1p1.samsung.com>
2016-12-30  4:14     ` [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention Andi Shyti
     [not found]       ` <20161230041421.24448-5-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2016-12-30  6:41         ` Chanwoo Choi
2017-01-06  6:49       ` Krzysztof Kozlowski

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