From: Rob Herring <robh@kernel.org>
To: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org,
devicetree@vger.kernel.org, a.swigon@samsung.com,
myungjoo.ham@samsung.com, inki.dae@samsung.com,
sw0312.kim@samsung.com, b.zolnierkie@samsung.com,
m.szyprowski@samsung.com, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH RFC v6 1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties
Date: Thu, 9 Jul 2020 15:04:48 -0600 [thread overview]
Message-ID: <20200709210448.GA876103@bogus> (raw)
In-Reply-To: <20200702163724.2218-2-s.nawrocki@samsung.com>
On Thu, Jul 02, 2020 at 06:37:19PM +0200, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells, bus-width.
> These properties allow to specify the SoC interconnect structure which
> then allows the interconnect consumer devices to request specific
> bandwidth requirements.
>
> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v6:
> - added dts example of bus hierarchy definition and the interconnect
> consumer,
> - added new bus-width property.
>
> Changes for v5:
> - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
> ---
> .../devicetree/bindings/devfreq/exynos-bus.txt | 68 +++++++++++++++++++++-
> 1 file changed, 66 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index e71f752..4035e3e 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -51,6 +51,13 @@ Optional properties only for parent bus device:
> - exynos,saturation-ratio: the percentage value which is used to calibrate
> the performance count against total cycle count.
>
> +Optional properties for interconnect functionality (QoS frequency constraints):
> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
> + passive devices should point to same node as the exynos,parent-bus property.
Adding vendor specific properties for a common binding defeats the
point.
> +- #interconnect-cells: should be 0.
> +- bus-width: the interconnect bus width in bits, default value is 8 when this
> + property is missing.
Your bus is 8-bits or 4-bits as the example?
> +
> Detailed correlation between sub-blocks and power line according to Exynos SoC:
> - In case of Exynos3250, there are two power line as following:
> VDD_MIF |--- DMC
> @@ -135,7 +142,7 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC:
> |--- PERIC (Fixed clock rate)
> |--- FSYS (Fixed clock rate)
>
> -Example1:
> +Example 1:
> Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
> power line (regulator). The MIF (Memory Interface) AXI bus is used to
> transfer data between DRAM and CPU and uses the VDD_MIF regulator.
> @@ -184,7 +191,7 @@ Example1:
> |L5 |200000 |200000 |400000 |300000 | ||1000000 |
> ----------------------------------------------------------
>
> -Example2 :
> +Example 2:
> The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
> is listed below:
>
> @@ -419,3 +426,60 @@ Example2 :
> devfreq = <&bus_leftbus>;
> status = "okay";
> };
> +
> +Example 3:
> + An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on
> + Exynos4412 SoC with video mixer as an interconnect consumer device.
> +
> + soc {
> + bus_dmc: bus_dmc {
> + compatible = "samsung,exynos-bus";
> + clocks = <&clock CLK_DIV_DMC>;
> + clock-names = "bus";
> + operating-points-v2 = <&bus_dmc_opp_table>;
> + bus-width = <4>;
> + #interconnect-cells = <0>;
> + status = "disabled";
> + };
> +
> + bus_leftbus: bus_leftbus {
> + compatible = "samsung,exynos-bus";
> + clocks = <&clock CLK_DIV_GDL>;
> + clock-names = "bus";
> + operating-points-v2 = <&bus_leftbus_opp_table>;
> + samsung,interconnect-parent = <&bus_dmc>;
> + #interconnect-cells = <0>;
> + status = "disabled";
> + };
> +
> + bus_display: bus_display {
> + compatible = "samsung,exynos-bus";
> + clocks = <&clock CLK_ACLK160>;
> + clock-names = "bus";
> + operating-points-v2 = <&bus_display_opp_table>;
> + samsung,interconnect-parent = <&bus_leftbus>;
> + #interconnect-cells = <0>;
> + status = "disabled";
> + };
> +
> + bus_dmc_opp_table: opp_table1 {
> + compatible = "operating-points-v2";
> + /* ... */
> + }
> +
> + bus_leftbus_opp_table: opp_table3 {
> + compatible = "operating-points-v2";
> + /* ... */
> + };
> +
> + bus_display_opp_table: opp_table4 {
> + compatible = "operating-points-v2";
> + /* .. */
> + };
> +
> + &mixer {
> + compatible = "samsung,exynos4212-mixer";
> + interconnects = <&bus_display &bus_dmc>;
> + /* ... */
> + };
> + };
> --
> 2.7.4
>
next prev parent reply other threads:[~2020-07-09 21:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200702163746eucas1p2363251b3b6fb6084123cedd67fa132d5@eucas1p2.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 0/6] Exynos: Simple QoS for exynos-bus using interconnect Sylwester Nawrocki
[not found] ` <CGME20200702163748eucas1p2cf7eab70bc072dea9a95183018b38ad3@eucas1p2.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties Sylwester Nawrocki
2020-07-03 0:47 ` Chanwoo Choi
2020-07-09 21:04 ` Rob Herring [this message]
2020-07-30 12:28 ` Sylwester Nawrocki
2020-08-28 14:49 ` Sylwester Nawrocki
2020-09-09 9:07 ` Georgi Djakov
2020-09-09 14:47 ` Sylwester Nawrocki
2020-09-15 21:40 ` Georgi Djakov
2020-10-30 12:29 ` Sylwester Nawrocki
[not found] ` <CGME20200702163753eucas1p16fbd5d59d05fb8e4fdcde9df839cb71e@eucas1p1.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 2/6] interconnect: Add generic interconnect driver for Exynos SoCs Sylwester Nawrocki
[not found] ` <CGME20200702163754eucas1p2bbe44897234a3e39dcd10b23e536a927@eucas1p2.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 3/6] PM / devfreq: exynos-bus: Add registration of interconnect child device Sylwester Nawrocki
[not found] ` <CGME20200702163756eucas1p282c6bc5a61f8dd7b6a5d59d92e92e2f1@eucas1p2.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 4/6] ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes Sylwester Nawrocki
[not found] ` <CGME20200702163758eucas1p1e18d95f3dce34df1f4334da5462a04a2@eucas1p1.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 5/6] ARM: dts: exynos: Add interconnects to Exynos4412 mixer Sylwester Nawrocki
[not found] ` <CGME20200702163801eucas1p12db276c7ac9e244e93e4b2f3d33ba729@eucas1p1.samsung.com>
2020-07-02 16:37 ` [PATCH RFC v6 6/6] drm: exynos: mixer: Add interconnect support Sylwester Nawrocki
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