From: "Łukasz Stelmach" <l.stelmach@samsung.com>
To: Kukjin Kim <kgene@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Andi Shyti <andi@etezian.org>, Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: m.szyprowski@samsung.com, b.zolnierkie@samsung.com,
"Łukasz Stelmach" <l.stelmach@samsung.com>
Subject: [PATCH v2 6/9] spi: spi-s3c64xx: Check return values
Date: Fri, 21 Aug 2020 18:13:58 +0200 [thread overview]
Message-ID: <20200821161401.11307-7-l.stelmach@samsung.com> (raw)
In-Reply-To: <20200821161401.11307-1-l.stelmach@samsung.com>
Check return values in prepare_dma() and s3c64xx_spi_config() and
propagate errors upwards.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
---
drivers/spi/spi-s3c64xx.c | 47 ++++++++++++++++++++++++++++++++-------
1 file changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 6381a7557def..02de734b8ab1 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -269,12 +269,13 @@ static void s3c64xx_spi_dmacb(void *data)
spin_unlock_irqrestore(&sdd->lock, flags);
}
-static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
+static int prepare_dma(struct s3c64xx_spi_dma_data *dma,
struct sg_table *sgt)
{
struct s3c64xx_spi_driver_data *sdd;
struct dma_slave_config config;
struct dma_async_tx_descriptor *desc;
+ int ret;
memset(&config, 0, sizeof(config));
@@ -298,12 +299,24 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
desc = dmaengine_prep_slave_sg(dma->ch, sgt->sgl, sgt->nents,
dma->direction, DMA_PREP_INTERRUPT);
+ if (!desc) {
+ dev_err(&sdd->pdev->dev, "unable to prepare %s scatterlist",
+ dma->direction == DMA_DEV_TO_MEM ? "rx" : "tx");
+ return -ENOMEM;
+ }
desc->callback = s3c64xx_spi_dmacb;
desc->callback_param = dma;
dma->cookie = dmaengine_submit(desc);
+ ret = dma_submit_error(dma->cookie);
+ if (ret) {
+ dev_err(&sdd->pdev->dev, "DMA submission failed");
+ return -EIO;
+ }
+
dma_async_issue_pending(dma->ch);
+ return 0;
}
static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable)
@@ -353,11 +366,12 @@ static bool s3c64xx_spi_can_dma(struct spi_master *master,
return xfer->len > (FIFO_LVL_MASK(sdd) >> 1) + 1;
}
-static void s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
+static int s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
struct spi_transfer *xfer, int dma_mode)
{
void __iomem *regs = sdd->regs;
u32 modecfg, chcfg;
+ int ret = 0;
modecfg = readl(regs + S3C64XX_SPI_MODE_CFG);
modecfg &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
@@ -383,7 +397,7 @@ static void s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
chcfg |= S3C64XX_SPI_CH_TXCH_ON;
if (dma_mode) {
modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
- prepare_dma(&sdd->tx_dma, &xfer->tx_sg);
+ ret = prepare_dma(&sdd->tx_dma, &xfer->tx_sg);
} else {
switch (sdd->cur_bpw) {
case 32:
@@ -415,12 +429,17 @@ static void s3c64xx_enable_datapath(struct s3c64xx_spi_driver_data *sdd,
writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
| S3C64XX_SPI_PACKET_CNT_EN,
regs + S3C64XX_SPI_PACKET_CNT);
- prepare_dma(&sdd->rx_dma, &xfer->rx_sg);
+ ret = prepare_dma(&sdd->rx_dma, &xfer->rx_sg);
}
}
+ if (ret)
+ return ret;
+
writel(modecfg, regs + S3C64XX_SPI_MODE_CFG);
writel(chcfg, regs + S3C64XX_SPI_CH_CFG);
+
+ return 0;
}
static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd,
@@ -553,9 +572,10 @@ static int s3c64xx_wait_for_pio(struct s3c64xx_spi_driver_data *sdd,
return 0;
}
-static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
+static int s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
{
void __iomem *regs = sdd->regs;
+ int ret;
u32 val;
/* Disable Clock */
@@ -603,7 +623,9 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
if (sdd->port_conf->clk_from_cmu) {
/* The src_clk clock is divided internally by 2 */
- clk_set_rate(sdd->src_clk, sdd->cur_speed * 2);
+ ret = clk_set_rate(sdd->src_clk, sdd->cur_speed * 2);
+ if (ret)
+ return ret;
} else {
/* Configure Clock */
val = readl(regs + S3C64XX_SPI_CLK_CFG);
@@ -617,6 +639,8 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
val |= S3C64XX_SPI_ENCLK_ENABLE;
writel(val, regs + S3C64XX_SPI_CLK_CFG);
}
+
+ return 0;
}
#define XFER_DMAADDR_INVALID DMA_BIT_MASK(32)
@@ -659,7 +683,9 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master,
sdd->cur_bpw = bpw;
sdd->cur_speed = speed;
sdd->cur_mode = spi->mode;
- s3c64xx_spi_config(sdd);
+ status = s3c64xx_spi_config(sdd);
+ if (status)
+ return status;
}
if (!is_polling(sdd) && (xfer->len > fifo_len) &&
@@ -686,10 +712,15 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master,
/* Start the signals */
s3c64xx_spi_set_cs(spi, true);
- s3c64xx_enable_datapath(sdd, xfer, use_dma);
+ status = s3c64xx_enable_datapath(sdd, xfer, use_dma);
spin_unlock_irqrestore(&sdd->lock, flags);
+ if (status) {
+ dev_err(&spi->dev, "failed to enable data path for transfer: %d\n", status);
+ break;
+ }
+
if (use_dma)
status = s3c64xx_wait_for_dma(sdd, xfer);
else
--
2.26.2
next prev parent reply other threads:[~2020-08-21 17:29 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200821161404eucas1p20577160d1bff2e8f5cae7403e93716ab@eucas1p2.samsung.com>
2020-08-21 16:13 ` [PATCH v2 0/9] Some fixes for spi-s3c64xx Łukasz Stelmach
[not found] ` <CGME20200821161405eucas1p1d43a5970c6a26389cd506aab5f986bc8@eucas1p1.samsung.com>
2020-08-21 16:13 ` [PATCH v2 1/9] spi: spi-s3c64xx: swap s3c64xx_spi_set_cs() and s3c64xx_enable_datapath() Łukasz Stelmach
2020-08-22 12:01 ` Krzysztof Kozlowski
[not found] ` <CGME20200821161405eucas1p20aad659cd41bc4f56d5123d3c63394f0@eucas1p2.samsung.com>
2020-08-21 16:13 ` [PATCH v2 2/9] spi: spi-s3s64xx: Add S3C64XX_SPI_QUIRK_CS_AUTO for Exynos3250 Łukasz Stelmach
2020-08-22 12:02 ` Krzysztof Kozlowski
[not found] ` <CGME20200821161405eucas1p19280babcd73926b5c22a48830f5fecd7@eucas1p1.samsung.com>
2020-08-21 16:13 ` [PATCH v2 3/9] spi: spi-s3c64xx: Report more information when errors occur Łukasz Stelmach
2020-08-22 12:03 ` Krzysztof Kozlowski
[not found] ` <CGME20200821161406eucas1p2be3221183a855afd0213f8ce58bd8942@eucas1p2.samsung.com>
2020-08-21 16:13 ` [PATCH v2 4/9] spi: spi-s3c64xx: Rename S3C64XX_SPI_SLAVE_* to S3C64XX_SPI_CS_* Łukasz Stelmach
[not found] ` <CGME20200821161406eucas1p121553719d4e9cc020d2c557a69000f0c@eucas1p1.samsung.com>
2020-08-21 16:13 ` [PATCH v2 5/9] spi: spi-s3c64xx: Fix doc comment for struct s3c64xx_spi_driver_data Łukasz Stelmach
2020-08-22 12:26 ` Krzysztof Kozlowski
[not found] ` <CGME20200821161407eucas1p116af63a668bdbb75fa974589e5f6139f@eucas1p1.samsung.com>
2020-08-21 16:13 ` Łukasz Stelmach [this message]
2020-08-22 12:37 ` [PATCH v2 6/9] spi: spi-s3c64xx: Check return values Krzysztof Kozlowski
2020-08-25 19:06 ` Sylwester Nawrocki
[not found] ` <CGME20200901152113eucas1p2977046b7a5b4c5a519f88870d658698a@eucas1p2.samsung.com>
2020-09-01 15:21 ` Lukasz Stelmach
2020-09-02 8:14 ` Sylwester Nawrocki
[not found] ` <CGME20200903084555eucas1p2f40375edb325107b68966fd52198b220@eucas1p2.samsung.com>
2020-09-03 8:45 ` Lukasz Stelmach
2020-09-03 11:18 ` Sylwester Nawrocki
[not found] ` <CGME20200821161407eucas1p249e4833b8839f717cc2a496ab43bb8a2@eucas1p2.samsung.com>
2020-08-21 16:13 ` [PATCH v2 7/9] spi: spi-s3c64xx: Ensure cur_speed holds actual clock value Łukasz Stelmach
2020-08-22 12:43 ` Krzysztof Kozlowski
2020-08-22 14:52 ` Tomasz Figa
2020-08-22 15:18 ` Krzysztof Kozlowski
2020-08-22 15:20 ` Tomasz Figa
[not found] ` <CGME20200824131716eucas1p16a3fde52aa765e7cd6584d4733762047@eucas1p1.samsung.com>
2020-08-24 13:17 ` Lukasz Stelmach
2020-08-24 13:21 ` Tomasz Figa
[not found] ` <CGME20200825090211eucas1p1b63191fa778a775e33169ba2c1d3b74b@eucas1p1.samsung.com>
2020-08-25 9:01 ` Lukasz Stelmach
2020-08-25 15:11 ` Tomasz Figa
[not found] ` <CGME20200825154611eucas1p284be8779ab484e675af071afef28376b@eucas1p2.samsung.com>
2020-08-25 15:45 ` Lukasz Stelmach
2020-08-22 14:54 ` Tomasz Figa
[not found] ` <CGME20200821161407eucas1p23a283ac117d4381e087e9bacec537665@eucas1p2.samsung.com>
2020-08-21 16:14 ` [PATCH v2 8/9] spi: spi-s3c64xx: Increase transfer timeout Łukasz Stelmach
2020-08-22 12:43 ` Krzysztof Kozlowski
[not found] ` <CGME20200821161408eucas1p196aa4b954b3d19ad1b89a48dbbe41fbc@eucas1p1.samsung.com>
2020-08-21 16:14 ` [PATCH v2 9/9] spi: spi-s3c64xx: Turn on interrupts upon resume Łukasz Stelmach
2020-08-22 12:44 ` Krzysztof Kozlowski
[not found] ` <CGME20201001152246eucas1p1ee289b8a85b707f7496355c081623796@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 0/9] Some fixes for spi-s3c64xx Łukasz Stelmach
[not found] ` <CGME20201001152246eucas1p1b4155ab4f06a39cc88f205b4a7cd47f9@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 1/9] spi: spi-s3c64xx: swap s3c64xx_spi_set_cs() and s3c64xx_enable_datapath() Łukasz Stelmach
[not found] ` <CGME20201001152246eucas1p2fb22ab55c276d76c4508142842c90ab8@eucas1p2.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 2/9] spi: spi-s3s64xx: Add S3C64XX_SPI_QUIRK_CS_AUTO for Exynos3250 Łukasz Stelmach
2020-10-01 19:04 ` Krzysztof Kozlowski
[not found] ` <CGME20201002101408eucas1p121c21cde5e644992078978d9bf1c5194@eucas1p1.samsung.com>
2020-10-02 10:13 ` Lukasz Stelmach
[not found] ` <CGME20201001152247eucas1p2b6b1cc61b9b175b0a621609cd58effbd@eucas1p2.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 3/9] spi: spi-s3c64xx: Check return values Łukasz Stelmach
[not found] ` <CGME20201001152247eucas1p2afff5b5b73f78d7c5111ac1c800e718a@eucas1p2.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 4/9] spi: spi-s3c64xx: Report more information when errors occur Łukasz Stelmach
[not found] ` <CGME20201001152248eucas1p10219600aaa0df6e030d2493b2aefbe92@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 5/9] spi: spi-s3c64xx: Rename S3C64XX_SPI_SLAVE_* to S3C64XX_SPI_CS_* Łukasz Stelmach
[not found] ` <CGME20201001152248eucas1p12f71c21a5873b6360e4b38efebb50271@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 6/9] spi: spi-s3c64xx: Fix doc comment for struct s3c64xx_spi_driver_data Łukasz Stelmach
[not found] ` <CGME20201001152248eucas1p132a63f588f62d902879322ebadd67173@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 7/9] spi: spi-s3c64xx: Ensure cur_speed holds actual clock value Łukasz Stelmach
2020-10-01 19:12 ` Krzysztof Kozlowski
[not found] ` <CGME20201001152249eucas1p1c3bbe7b2a677affe4e1a1e4d469f94c8@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 8/9] spi: spi-s3c64xx: Increase transfer timeout Łukasz Stelmach
[not found] ` <CGME20201001152249eucas1p165b78adf542a48b38b49cb5e00500e26@eucas1p1.samsung.com>
2020-10-01 15:21 ` [PATCH v2 RESEND 9/9] spi: spi-s3c64xx: Turn on interrupts upon resume Łukasz Stelmach
2020-10-01 16:13 ` [PATCH v2 RESEND 0/9] Some fixes for spi-s3c64xx Mark Brown
[not found] ` <CGME20201001182315eucas1p1b1fc9d5d0ea91db6e56e92d5cf2583e5@eucas1p1.samsung.com>
2020-10-01 18:23 ` Lukasz Stelmach
2020-10-01 19:02 ` Krzysztof Kozlowski
2020-10-01 19:43 ` Mark Brown
2020-10-02 6:18 ` Krzysztof Kozlowski
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