From: Chanho Park <chanho61.park@samsung.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
"James E . J . Bottomley" <jejb@linux.ibm.com>,
"Martin K . Petersen" <martin.petersen@oracle.com>
Cc: Can Guo <cang@codeaurora.org>, Jaegeuk Kim <jaegeuk@kernel.org>,
Kiwoong Kim <kwmad.kim@samsung.com>,
Avri Altman <avri.altman@wdc.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Christoph Hellwig <hch@infradead.org>,
Bart Van Assche <bvanassche@acm.org>,
jongmin jeong <jjmin.jeong@samsung.com>,
Gyunghoon Kwon <goodjob.kwon@samsung.com>,
linux-samsung-soc@vger.kernel.org, linux-scsi@vger.kernel.org,
Chanho Park <chanho61.park@samsung.com>
Subject: [PATCH v2 13/15] scsi: ufs: ufs-exynos: support exynosauto v9 ufs driver
Date: Wed, 14 Jul 2021 16:11:29 +0900 [thread overview]
Message-ID: <20210714071131.101204-14-chanho61.park@samsung.com> (raw)
In-Reply-To: <20210714071131.101204-1-chanho61.park@samsung.com>
This patch adds to support ufs variant for ExynosAuto v9 SoC. This
requires control UFS IP sharability register via syscon and regmap.
Regarding uic_attr, most of values can be shared with exynos7 except
tx_dif_p_nsec value.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
.../bindings/ufs/samsung,exynos-ufs.yaml | 1 +
drivers/scsi/ufs/ufs-exynos.c | 96 +++++++++++++++++++
2 files changed, 97 insertions(+)
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index d3e31b23b62d..fa5247c4a44f 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -20,6 +20,7 @@ properties:
compatible:
enum:
- samsung,exynos7-ufs
+ - samsung,exynosautov9-ufs
reg:
items:
diff --git a/drivers/scsi/ufs/ufs-exynos.c b/drivers/scsi/ufs/ufs-exynos.c
index 9669afe8f1f4..200137e6ecce 100644
--- a/drivers/scsi/ufs/ufs-exynos.c
+++ b/drivers/scsi/ufs/ufs-exynos.c
@@ -15,6 +15,7 @@
#include <linux/mfd/syscon.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include "ufshcd.h"
#include "ufshcd-pltfrm.h"
@@ -76,6 +77,12 @@
UIC_TRANSPORT_NO_CONNECTION_RX |\
UIC_TRANSPORT_BAD_TC)
+/* FSYS UFS Shareability */
+#define UFS_WR_SHARABLE BIT(2)
+#define UFS_RD_SHARABLE BIT(1)
+#define UFS_SHARABLE (UFS_WR_SHARABLE | UFS_RD_SHARABLE)
+#define UFS_SHAREABILITY_OFFSET 0x710
+
enum {
UNIPRO_L1_5 = 0,/* PHY Adapter */
UNIPRO_L2, /* Data Link */
@@ -151,6 +158,79 @@ static int exynos7_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
return 0;
}
+static int exynosauto_ufs_drv_init(struct device *dev, struct exynos_ufs *ufs)
+{
+ struct exynos_ufs_uic_attr *attr = ufs->drv_data->uic_attr;
+
+ /* IO Coherency setting */
+ if (ufs->sysreg) {
+ return regmap_update_bits(ufs->sysreg, UFS_SHAREABILITY_OFFSET,
+ UFS_SHARABLE, UFS_SHARABLE);
+ }
+
+ attr->tx_dif_p_nsec = 3200000;
+
+ return 0;
+}
+
+static int exynosauto_ufs_pre_link(struct exynos_ufs *ufs)
+{
+ struct ufs_hba *hba = ufs->hba;
+ int i;
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x40);
+ for_each_ufs_rx_lane(ufs, i) {
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x12, i),
+ DIV_ROUND_UP(NSEC_PER_SEC, ufs->mclk_rate));
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x11, i), 0x0);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1b, i), 0x2);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1c, i), 0x8a);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1d, i), 0xa3);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1b, i), 0x2);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1c, i), 0x8a);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1d, i), 0xa3);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x2f, i), 0x79);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x84, i), 0x1);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x25, i), 0xf6);
+ }
+
+ for_each_ufs_tx_lane(ufs, i) {
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xaa, i),
+ DIV_ROUND_UP(NSEC_PER_SEC, ufs->mclk_rate));
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xa9, i), 0x02);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xab, i), 0x8);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xac, i), 0x22);
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xad, i), 0x8);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x04, i), 0x1);
+ }
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB(0x200), 0x0);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0x0);
+
+ ufshcd_dme_set(hba, UIC_ARG_MIB(0xa011), 0x8000);
+
+ return 0;
+}
+
+static int exynosauto_ufs_pre_pwr_change(struct exynos_ufs *ufs,
+ struct ufs_pa_layer_attr *pwr)
+{
+ struct ufs_hba *hba = ufs->hba;
+
+ /* PACP_PWR_req and delivered to the remote DME */
+ ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0), 12000);
+ ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1), 32000);
+ ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2), 16000);
+
+ return 0;
+}
+
static int exynos7_ufs_pre_link(struct exynos_ufs *ufs)
{
struct ufs_hba *hba = ufs->hba;
@@ -1305,6 +1385,20 @@ static struct exynos_ufs_uic_attr exynos7_uic_attr = {
.pa_dbg_option_suite = 0x30103,
};
+static struct exynos_ufs_drv_data exynosauto_ufs_drvs = {
+ .uic_attr = &exynos7_uic_attr,
+ .quirks = UFSHCD_QUIRK_PRDT_BYTE_GRAN |
+ UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR |
+ UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR |
+ UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING,
+ .opts = EXYNOS_UFS_OPT_BROKEN_AUTO_CLK_CTRL |
+ EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR |
+ EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX,
+ .drv_init = exynosauto_ufs_drv_init,
+ .pre_link = exynosauto_ufs_pre_link,
+ .pre_pwr_change = exynosauto_ufs_pre_pwr_change,
+};
+
static struct exynos_ufs_drv_data exynos_ufs_drvs = {
.uic_attr = &exynos7_uic_attr,
.quirks = UFSHCD_QUIRK_PRDT_BYTE_GRAN |
@@ -1330,6 +1424,8 @@ static struct exynos_ufs_drv_data exynos_ufs_drvs = {
static const struct of_device_id exynos_ufs_of_match[] = {
{ .compatible = "samsung,exynos7-ufs",
.data = &exynos_ufs_drvs },
+ { .compatible = "samsung,exynosautov9-ufs",
+ .data = &exynosauto_ufs_drvs },
{},
};
--
2.32.0
next prev parent reply other threads:[~2021-07-14 7:12 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20210714071158epcas2p1a7b98fd67b9bcaaa634e59fc224761b1@epcas2p1.samsung.com>
2021-07-14 7:11 ` [PATCH v2 00/15] introduce exynosauto v9 ufs driver Chanho Park
[not found] ` <CGME20210714071158epcas2p261e6c9157056fafca0f55aaf05cd68ef@epcas2p2.samsung.com>
2021-07-14 7:11 ` [PATCH v2 01/15] scsi: ufs: add quirk to handle broken UIC command Chanho Park
[not found] ` <CGME20210714071158epcas2p29900b577a489b760a1e67eba976fb815@epcas2p2.samsung.com>
2021-07-14 7:11 ` [PATCH v2 02/15] scsi: ufs: add quirk to enable host controller without ph configuration Chanho Park
[not found] ` <CGME20210714071159epcas2p36dc12e150a84ef4fa2516bc98169725b@epcas2p3.samsung.com>
2021-07-14 7:11 ` [PATCH v2 03/15] scsi: ufs: ufs-exynos: change pclk available max value Chanho Park
[not found] ` <CGME20210714071159epcas2p3fa23ac2a670e1c31deeac1c9332f76fe@epcas2p3.samsung.com>
2021-07-14 7:11 ` [PATCH v2 04/15] scsi: ufs: ufs-exynos: simplify drv_data retrieval Chanho Park
[not found] ` <CGME20210714071159epcas2p2ae981fb3b91b0eba23060de5de104ec0@epcas2p2.samsung.com>
2021-07-14 7:11 ` [PATCH v2 05/15] scsi: ufs: ufs-exynos: get sysreg regmap for io-coherency Chanho Park
[not found] ` <CGME20210714071159epcas2p3d39f7e5cbd9a2b8addaa496a396213af@epcas2p3.samsung.com>
2021-07-14 7:11 ` [PATCH v2 06/15] scsi: ufs: ufs-exynos: add refclkout_stop control Chanho Park
[not found] ` <CGME20210714071159epcas2p4c4eabf50abdaa46567fc5356bce8942b@epcas2p4.samsung.com>
2021-07-14 7:11 ` [PATCH v2 07/15] scsi: ufs: ufs-exynos: add setup_clocks callback Chanho Park
[not found] ` <CGME20210714071159epcas2p24b7be0cad31af09bc71c608f9b03fe36@epcas2p2.samsung.com>
2021-07-14 7:11 ` [PATCH v2 08/15] scsi: ufs: ufs-exynos: correct timeout value setting registers Chanho Park
[not found] ` <CGME20210714071159epcas2p4edc8104aad36d4d7a5bedb8328c0ab39@epcas2p4.samsung.com>
2021-07-14 7:11 ` [PATCH v2 09/15] scsi: ufs: ufs-exynos: support custom version of ufs_hba_variant_ops Chanho Park
[not found] ` <CGME20210714071159epcas2p24323976939fa21a5ed44d81649b33d85@epcas2p2.samsung.com>
2021-07-14 7:11 ` [PATCH v2 10/15] scsi: ufs: ufs-exynos: add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR option Chanho Park
[not found] ` <CGME20210714071159epcas2p176be9a1310f8de27cfb3786fe86630d6@epcas2p1.samsung.com>
2021-07-14 7:11 ` [PATCH v2 11/15] scsi: ufs: ufs-exynos: factor out priv data init Chanho Park
[not found] ` <CGME20210714071159epcas2p428292c7d0e97533de65d92a029eece93@epcas2p4.samsung.com>
2021-07-14 7:11 ` [PATCH v2 12/15] scsi: ufs: ufs-exynos: add pre/post_hce_enable drv callbacks Chanho Park
[not found] ` <CGME20210714071200epcas2p199f4f7b209e565c9a87440af319acda1@epcas2p1.samsung.com>
2021-07-14 7:11 ` Chanho Park [this message]
[not found] ` <CGME20210714071200epcas2p3f76e68f6bbb4755574dba2055a8130ab@epcas2p3.samsung.com>
2021-07-14 7:11 ` [PATCH v2 14/15] scsi: ufs: ufs-exynos: multi-host configuration for exynosauto Chanho Park
2021-07-26 9:08 ` Bean Huo
2021-07-26 10:40 ` Chanho Park
2021-07-26 21:58 ` Bean Huo
2021-07-27 10:14 ` Chanho Park
2021-07-27 19:36 ` Bean Huo
2021-07-28 1:39 ` Chanho Park
2021-07-29 21:10 ` Bean Huo
2021-07-26 22:06 ` Bean Huo
2021-07-27 9:05 ` Chanho Park
[not found] ` <CGME20210714071200epcas2p413ca643dc459ee75ec7e5e4f8a6c05d7@epcas2p4.samsung.com>
2021-07-14 7:11 ` [PATCH v2 15/15] scsi: ufs: ufs-exynos: introduce exynosauto v9 virtual host Chanho Park
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