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From: Sam Protsenko <>
To: Tomasz Figa <>,
	Krzysztof Kozlowski <>,
	Sylwester Nawrocki <>,
	Linus Walleij <>
Cc: Ryu Euiyoul <>,
	Charles Keepax <>,,,,
Subject: [PATCH] pinctrl: samsung: Fix pinctrl bank pin count
Date: Fri, 30 Jul 2021 22:29:05 +0300	[thread overview]
Message-ID: <> (raw)

From: Jaehyoung Choi <>

Commit 1abd18d1a51a ("pinctrl: samsung: Register pinctrl before GPIO")
changes the order of GPIO and pinctrl registration: now pinctrl is
registered before GPIO. That means gpio_chip->ngpio is not set when
samsung_pinctrl_register() called, and one cannot rely on that value
anymore. Use `pin_bank->nr_pins' instead of `pin_bank->gpio_chip.ngpio'
to fix mentioned inconsistency.

Fixes: 1abd18d1a51a ("pinctrl: samsung: Register pinctrl before GPIO")
Signed-off-by: Jaehyoung Choi <>
Signed-off-by: Sam Protsenko <>
NOTE: Re-sending this fix separately, to exclude it from
"Add minimal support for Exynos850 SoC" series

 drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 376876bd6605..2975b4369f32 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -918,7 +918,7 @@ static int samsung_pinctrl_register(struct platform_device *pdev,
 		pin_bank->grange.pin_base = drvdata->pin_base
 						+ pin_bank->pin_base;
 		pin_bank->grange.base = pin_bank->grange.pin_base;
-		pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
+		pin_bank->grange.npins = pin_bank->nr_pins;
 		pin_bank->grange.gc = &pin_bank->gpio_chip;
 		pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);

             reply	other threads:[~2021-07-30 19:29 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-30 19:29 Sam Protsenko [this message]
2021-08-02 13:23 ` [PATCH] pinctrl: samsung: Fix pinctrl bank pin count Krzysztof Kozlowski

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