From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bartlomiej Zolnierkiewicz Subject: Re: [PATCH v2 3/4] phy: exynos-mipi-video: Use consistent method to address phy registers Date: Tue, 14 Mar 2017 15:37:26 +0100 Message-ID: <3789146.ZdZalfNrev@amdc3058> References: <20170311182534.13345-1-krzk@kernel.org> <20170311182534.13345-4-krzk@kernel.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7Bit Return-path: In-reply-to: <20170311182534.13345-4-krzk@kernel.org> Sender: linux-kernel-owner@vger.kernel.org To: Krzysztof Kozlowski Cc: Kishon Vijay Abraham I , Kukjin Kim , Javier Martinez Canillas , Lee Jones , Sylwester Nawrocki , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org On Saturday, March 11, 2017 08:25:33 PM Krzysztof Kozlowski wrote: > Exynos4 MIPI phy registers are defined with macro calculating the offset > for given phyN. Use the same method for Exynos5420 to be consistent. > > Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bartlomiej Zolnierkiewicz Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics