From: Chanwoo Choi <cw00.choi@samsung.com>
To: Sylwester Nawrocki <s.nawrocki@samsung.com>,
georgi.djakov@linaro.org, krzk@kernel.org
Cc: a.swigon@samsung.com, myungjoo.ham@samsung.com,
inki.dae@samsung.com, sw0312.kim@samsung.com,
b.zolnierkie@samsung.com, m.szyprowski@samsung.com,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH v5 6/6] drm: exynos: mixer: Add interconnect support
Date: Mon, 1 Jun 2020 16:58:18 +0900 [thread overview]
Message-ID: <7e42706f-2e69-79a6-d138-f2aa5e800270@samsung.com> (raw)
In-Reply-To: <20200529163200.18031-7-s.nawrocki@samsung.com>
Hi Sylwester,
On 5/30/20 1:32 AM, Sylwester Nawrocki wrote:
> From: Marek Szyprowski <m.szyprowski@samsung.com>
>
> This patch adds interconnect support to exynos-mixer. The mixer works
> the same as before when CONFIG_INTERCONNECT is 'n'.
>
> For proper operation of the video mixer block we need to ensure the
> interconnect busses like DMC or LEFTBUS provide enough bandwidth so
> as to avoid DMA buffer underruns in the mixer block. i.e we need to
> prevent those busses from operating in low perfomance OPPs when
> the mixer is running.
> In this patch the bus bandwidth request is done through the interconnect
> API, the bandiwidth value is calculated from selected DRM mode, i.e.
> video plane width, height, refresh rate and pixel format.
>
> Co-developed-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> [s.nawrocki: renamed soc_path variable to icc_path, edited commit desc.]
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v5:
> - renamed soc_path variable to icc_path
> ---
> drivers/gpu/drm/exynos/exynos_mixer.c | 73 ++++++++++++++++++++++++++++++++---
> 1 file changed, 68 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
> index 21b726b..bdae683 100644
> --- a/drivers/gpu/drm/exynos/exynos_mixer.c
> +++ b/drivers/gpu/drm/exynos/exynos_mixer.c
> @@ -13,6 +13,7 @@
> #include <linux/component.h>
> #include <linux/delay.h>
> #include <linux/i2c.h>
> +#include <linux/interconnect.h>
> #include <linux/interrupt.h>
> #include <linux/irq.h>
> #include <linux/kernel.h>
> @@ -98,6 +99,7 @@ struct mixer_context {
> struct exynos_drm_crtc *crtc;
> struct exynos_drm_plane planes[MIXER_WIN_NR];
> unsigned long flags;
> + struct icc_path *icc_path;
>
> int irq;
> void __iomem *mixer_regs;
> @@ -934,6 +936,42 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc)
> mixer_reg_writemask(mixer_ctx, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);
> }
>
> +static void mixer_set_memory_bandwidth(struct exynos_drm_crtc *crtc)
> +{
> + struct drm_display_mode *mode = &crtc->base.state->adjusted_mode;
> + struct mixer_context *ctx = crtc->ctx;
> + unsigned long bw, bandwidth = 0;
> + u32 avg_bw, peak_bw;
> + int i, j, sub;
> +
> + if (!ctx->icc_path)
> + return;
> +
> + for (i = 0; i < MIXER_WIN_NR; i++) {
> + struct drm_plane *plane = &ctx->planes[i].base;
> + const struct drm_format_info *format;
> +
> + if (plane->state && plane->state->crtc && plane->state->fb) {
> + format = plane->state->fb->format;
> + bw = mode->hdisplay * mode->vdisplay *
> + drm_mode_vrefresh(mode);
> + if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> + bw /= 2;
> + for (j = 0; j < format->num_planes; j++) {
> + sub = j ? (format->vsub * format->hsub) : 1;
> + bandwidth += format->cpp[j] * bw / sub;
First of all, I agree this approach.
Could you please add more detailed comments for understadning
about this calculation? As you commented, it seems that
the final bandwidth contains the width/height/refresh rate
and pixel format. If you add one real example, it will be very helpful.
(snip)
--
Best Regards,
Chanwoo Choi
Samsung Electronics
next prev parent reply other threads:[~2020-06-01 7:47 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20200529163213eucas1p1ac148f9238214ac84f3d0cc199c4398b@eucas1p1.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 0/6] Exynos: Simple QoS for exynos-bus using interconnect Sylwester Nawrocki
[not found] ` <CGME20200529163219eucas1p2d127fe3936921f53f6fe7902e7d14a3e@eucas1p2.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties Sylwester Nawrocki
2020-05-31 0:01 ` Chanwoo Choi
2020-06-01 9:40 ` Sylwester Nawrocki
2020-06-01 8:19 ` Sylwester Nawrocki
2020-06-02 8:05 ` Krzysztof Kozlowski
[not found] ` <CGME20200529163223eucas1p2f663280abb499b4114b2f2930b43a4e5@eucas1p2.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 2/6] interconnect: Add generic interconnect driver for Exynos SoCs Sylwester Nawrocki
2020-05-31 0:13 ` Chanwoo Choi
2020-06-01 9:57 ` Sylwester Nawrocki
2020-06-02 8:21 ` Krzysztof Kozlowski
2020-06-03 9:24 ` Sylwester Nawrocki
2020-07-01 12:50 ` Georgi Djakov
2020-07-02 12:01 ` Sylwester Nawrocki
2020-07-02 12:33 ` Georgi Djakov
2020-07-02 14:24 ` Sylwester Nawrocki
[not found] ` <CGME20200529163225eucas1p1cfb2233c869dcc3dab84b754bbce17b6@eucas1p1.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 3/6] PM / devfreq: exynos-bus: Add registration of interconnect child device Sylwester Nawrocki
2020-05-30 23:57 ` Chanwoo Choi
2020-06-01 10:04 ` Sylwester Nawrocki
2020-06-02 0:50 ` Chanwoo Choi
[not found] ` <CGME20200529163226eucas1p15bea74bed9cc5d22727c9ba732a5cbb9@eucas1p1.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 4/6] ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes Sylwester Nawrocki
2020-05-31 0:02 ` Chanwoo Choi
[not found] ` <CGME20200529163228eucas1p1d05340fef9ffc724f5d3d9f5709a600f@eucas1p1.samsung.com>
2020-05-29 16:31 ` [RFC PATCH v5 5/6] ARM: dts: exynos: Add interconnects to Exynos4412 mixer Sylwester Nawrocki
2020-05-31 0:07 ` Chanwoo Choi
[not found] ` <CGME20200529163229eucas1p2ee6394f184e5eba12599559f8a621fde@eucas1p2.samsung.com>
2020-05-29 16:32 ` [RFC PATCH v5 6/6] drm: exynos: mixer: Add interconnect support Sylwester Nawrocki
2020-06-01 7:58 ` Chanwoo Choi [this message]
2020-06-03 10:04 ` Sylwester Nawrocki
2020-06-01 8:17 ` [RFC PATCH v5 0/6] Exynos: Simple QoS for exynos-bus using interconnect Sylwester Nawrocki
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