From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED3E4C432BE for ; Thu, 5 Aug 2021 07:30:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6D7E6105A for ; Thu, 5 Aug 2021 07:30:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232409AbhHEHav (ORCPT ); Thu, 5 Aug 2021 03:30:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:38408 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231499AbhHEHau (ORCPT ); Thu, 5 Aug 2021 03:30:50 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0812960F58; Thu, 5 Aug 2021 07:30:37 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mBXpr-0034o3-4w; Thu, 05 Aug 2021 08:30:35 +0100 Date: Thu, 05 Aug 2021 08:30:30 +0100 Message-ID: <87zgtwbb6x.wl-maz@kernel.org> From: Marc Zyngier To: Krzysztof Kozlowski Cc: Sam Protsenko , Sylwester Nawrocki , Chanwoo Choi , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree , linux-arm Mailing List , linux-clk , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List , Linux Samsung SOC , "open list:SERIAL DRIVERS" Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support In-Reply-To: References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-13-semen.protsenko@linaro.org> <15871f8ced3c757fad1ab3b6e62c4e64@misterjones.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: krzysztof.kozlowski@canonical.com, semen.protsenko@linaro.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com, jirislaby@kernel.org, gregkh@linuxfoundation.org, ckeepax@opensource.wolfsonmicro.com, ryu.real@samsung.com, tom.gall@linaro.org, sumit.semwal@linaro.org, john.stultz@linaro.org, amit.pundir@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org On Thu, 05 Aug 2021 08:17:14 +0100, Krzysztof Kozlowski wrote: > > On 04/08/2021 23:30, Sam Protsenko wrote: > >>> > >>> Nice catch! Actually there is an error (typo?) in SoC's TRM, saying > >>> that Virtual Interface Control Register starts at 0x3000 offset (from > >>> 0x12a00000), where it obviously should be 0x4000, that's probably > >>> where this dts error originates from. Btw, I'm also seeing the same > >>> error in exynos7.dtsi. > >> > >> What's the error exactly? The "Virtual interface control register" > >> offset (3rd region) is set properly to 0x4000 on Exynos7. Also one for > >> the Exynos5433 looks correct. > >> > > > > The issue is that 2nd region's size is 0x1000, but it must be 0x2000. > > It's defined by GIC-400 architecture, as I understand. Please look at > > [1], table 3-1 has very specific offsets and sizes for each functional > > block, and each particular SoC must adhere to that spec. So having > > 0x1000 for 2nd region can't be correct. And because exynos7.dtsi has > > GIC-400 as well, and 0x1000 is specified there for 2nd region size > > too, so I presume there is the same mistake there. > > I understand, the range length has indeed same mistake. However it does > not matter that much There are no registers pass 0x10C (so pass 0x1000). > This address space is not used. I have no idea which spec you are looking at, but the GICv2 architecture (of which GIC400 is an implementation) definitely has a register in the second 4kB page of the CPU interface. It contains the GICC_DIR register, which is used to deactivate an interrupt when EOIMode==1. Linux actively uses it when started at EL2. M. -- Without deviation from the norm, progress is not possible.