Re: [PATCH v3 05/17] dt-bindings: ufs: exynos-ufs: add sysreg regmap property

[Rob Herring <robh@kernel.org>]

On Thu, Sep 23, 2021 at 09:47:44AM +0900, Chanho Park wrote:
> > > +  sysreg:
> > 
> > Needs a vendor prefix.
> 
> Thanks. I'll use "samsung,sysreg-phandle".

No '-phandle'.

> 
> > 
> > > +    $ref: '/schemas/types.yaml#/definitions/phandle'
> > > +    description: phandle for FSYS sysreg interface, used to control
> > > +                 sysreg register bit for UFS IO Coherency
> > 
> > Is there more than 1 FSYS? If not, you can just get the node by its
> > compatible.
> 
> The phandle can be differed each exynos SoCs, AFAIK. I think other exynos
> SoCs since exnos7 will need this but not upstreamed yet...

That's still fine. You really only need a phandle if there is more than 
1 instance on a given platform.

Of course you could end up with multiple compatible strings to deal 
with, but you might need that anyway as the registers are likely to be 
different. That can sometimes be mitigated by putting register offsets 
into the DT property (something to consider here).  This is the problem 
with drivers directly twiddling bits in  other h/w blocks and why we 
have common interfaces for clocks, resets, etc.

I leave it to you to decide how you want to do it.

BTW, If you want to see another way to handle the same problem, see 
highbank_platform_notifier(). Notifiers aren't great either, but it 
keeps some SoC specifics out of the driver.

Rob