From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jaehoon Chung Subject: Re: [PATCH 2/4] Documetation: samsung-phy: add the exynos-pcie-phy binding Date: Wed, 04 Jan 2017 17:18:56 +0900 Message-ID: References: <20161228103454.26467-1-jh80.chung@samsung.com> <20161228103454.26467-3-jh80.chung@samsung.com> <20170103180507.b7otjrfo4ye3yx42@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <20170103180507.b7otjrfo4ye3yx42@rob-hp-laptop> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, bhelgaas@google.com, mark.rutland@arm.com, kgene@kernel.org, krzk@kernel.org, kishon@ti.com, jingoohan1@gmail.com, vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com, alim.akhtar@samsung.com, cpgs@samsung.com List-Id: linux-samsung-soc@vger.kernel.org On 01/04/2017 03:05 AM, Rob Herring wrote: > On Wed, Dec 28, 2016 at 07:34:52PM +0900, Jaehoon Chung wrote: >> Adds the exynos-pcie-phy binding for Exynos PCIe PHY. >> This is for using generic PHY framework. >> >> Signed-off-by: Jaehoon Chung >> --- >> .../devicetree/bindings/phy/samsung-phy.txt | 23 ++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt >> index 9872ba8..1cbc15f 100644 >> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt >> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt >> @@ -191,3 +191,26 @@ Example: >> usbdrdphy0 = &usb3_phy0; >> usbdrdphy1 = &usb3_phy1; >> }; >> + >> +Samsung Exynos SoC series PCIe PHY controller >> +-------------------------------------------------- >> +Required properties: >> +- compatible : Should be set to "samsung,exynos5440-pcie-phy" >> +- #phy-cells : Must be zero >> +- reg : a register used by phy driver. >> + >> +Required properies for child node: >> +- reg : a block register used by phy driver. > > There's no need for this. Either just make the length 0x1040 or add a > 2nd address to the parent reg prop. Will use the 2nd address to the parent reg prop. Because there are two pcie-phy for Exynos5440. one block register is started from 0x271000, the other is started from 0x271040. Best Regards, Jaehoon Chung > >> + >> +Example: >> + pcie_phy0: pcie-phy@270000 { >> + #phy-cells = <0>; >> + compatible = "samsung,exynos5440-pcie-phy"; >> + reg = <0x270000 0x1000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + block@271000 { >> + reg = <0x271000 0x40>; >> + }; >> + }; >> -- >> 2.10.2 >> > -- > To unsubscribe from this list: send the line "unsubscribe linux-pci" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > > >