From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: "Sam Protsenko" <semen.protsenko@linaro.org>,
"Sylwester Nawrocki" <s.nawrocki@samsung.com>,
"Paweł Chmiel" <pawel.mikolaj.chmiel@gmail.com>,
"Chanwoo Choi" <cw00.choi@samsung.com>,
"Tomasz Figa" <tomasz.figa@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>
Cc: Ryu Euiyoul <ryu.real@samsung.com>,
Tom Gall <tom.gall@linaro.org>,
Sumit Semwal <sumit.semwal@linaro.org>,
John Stultz <john.stultz@linaro.org>,
Amit Pundir <amit.pundir@linaro.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-samsung-soc@vger.kernel.org
Subject: Re: [PATCH 5/6] dt-bindings: clock: Document Exynos850 CMU bindings
Date: Wed, 15 Sep 2021 10:28:46 +0200 [thread overview]
Message-ID: <b7fd881e-b027-fb87-3740-69cf00f795c0@canonical.com> (raw)
In-Reply-To: <20210914155607.14122-6-semen.protsenko@linaro.org>
On 14/09/2021 17:56, Sam Protsenko wrote:
> Provide dt-schema documentation for Exynos850 SoC clock controller.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> .../clock/samsung,exynos850-clock.yaml | 190 ++++++++++++++++++
> 1 file changed, 190 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> new file mode 100644
> index 000000000000..b69ba4125421
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
> @@ -0,0 +1,190 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos850 SoC clock controller
> +
> +maintainers:
> + - Sam Protsenko <semen.protsenko@linaro.org>
> + - Chanwoo Choi <cw00.choi@samsung.com>
> + - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> + - Sylwester Nawrocki <s.nawrocki@samsung.com>
> + - Tomasz Figa <tomasz.figa@gmail.com>
> +
> +description: |
> + Exynos850 clock controller is comprised of several CMU units, generating
> + clocks for different domains. Those CMU units are modeled as separate device
> + tree nodes, and might depend on each other. Root clocks in that clock tree are
> + two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
> + clocks must be defined as fixed-rate clocks in dts.
> +
> + CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
> + dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
> +
> + Each clock is assigned an identifier and client nodes can use this identifier
> + to specify the clock which they consume. All clocks that available for usage
> + in clock consumer nodes are defined as preprocessor macros in
> + 'dt-bindings/clock/exynos850.h' header.
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos850-cmu-top
> + - samsung,exynos850-cmu-core
> + - samsung,exynos850-cmu-hsi
> + - samsung,exynos850-cmu-peri
> +
> + clocks:
> + minItems: 1
> + maxItems: 5
> +
> + clock-names:
> + minItems: 1
> + maxItems: 5
> +
> + "#clock-cells":
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos850-cmu-top
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> +
> + clock-names:
> + items:
> + - const: oscclk
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos850-cmu-core
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> + - description: CMU_CORE bus clock (from CMU_TOP)
> + - description: CCI clock (from CMU_TOP)
> + - description: eMMC clock (from CMU_TOP)
> + - description: SSS clock (from CMU_TOP)
> +
> + clock-names:
> + items:
> + - const: oscclk
> + - const: dout_core_bus
> + - const: dout_core_cci
> + - const: dout_core_mmc_embd
> + - const: dout_core_sss
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos850-cmu-hsi
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> + - description: External RTC clock (32768 Hz)
> + - description: CMU_HSI bus clock (from CMU_TOP)
> + - description: SD card clock (from CMU_TOP)
> + - description: "USB 2.0 DRD clock (from CMU_TOP)"
> +
> + clock-names:
> + items:
> + - const: oscclk
> + - const: rtcclk
> + - const: dout_hsi_bus
> + - const: dout_hsi_mmc_card
> + - const: dout_hsi_usb20drd
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: samsung,exynos850-cmu-peri
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: External reference clock (26 MHz)
> + - description: CMU_PERI bus clock (from CMU_TOP)
> + - description: UART clock (from CMU_TOP)
> + - description: Parent clock for HSI2C and SPI (from CMU_TOP)
> +
> + clock-names:
> + items:
> + - const: oscclk
> + - const: dout_peri_bus
> + - const: dout_peri_uart
> + - const: dout_peri_ip
> +
> +required:
> + - compatible
> + - "#clock-cells"
> + - clocks
> + - clock-names
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + # Clock controller node for CMU_PERI
> + - |
> + #include <dt-bindings/clock/exynos850.h>
> +
> + cmu_peri: clock-controller@10030000 {
> + compatible = "samsung,exynos850-cmu-peri";
> + reg = <0x10030000 0x8000>;
> + #clock-cells = <1>;
> +
> + clocks = <&oscclk>, <&cmu_top DOUT_PERI_BUS>,
> + <&cmu_top DOUT_PERI_UART>,
> + <&cmu_top DOUT_PERI_IP>;
> + clock-names = "oscclk", "dout_peri_bus",
> + "dout_peri_uart", "dout_peri_ip";
> + };
> +
> + # External reference clock (should be provided in particular board DTS)
> + - |
> + oscclk: clock-oscclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "oscclk";
> + clock-frequency = <26000000>;
> + };
Skip ossclk - it's trivial and not related to these bindings.
> +
> + # UART controller node that consumes the clock generated by CMU_PERI
> + - |
> + #include <dt-bindings/clock/exynos850.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + serial_0: serial@13820000 {
> + compatible = "samsung,exynos850-uart";
> + reg = <0x13820000 0x100>;
> + interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins>;
> + clocks = <&cmu_peri GOUT_UART_PCLK>, <&cmu_peri GOUT_UART_IPCLK>;
> + clock-names = "uart", "clk_uart_baud0";
The same, skip it because it is trivial and common with all clock providers.
Also Rob's robot checker complains about it.
Best regards,
Krzysztof
next prev parent reply other threads:[~2021-09-15 8:28 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 15:56 [PATCH 0/6] clk: samsung: Introduce Exynos850 SoC clock driver Sam Protsenko
2021-09-14 15:56 ` [PATCH 1/6] clk: samsung: Enable bus clock on init Sam Protsenko
2021-09-15 8:21 ` Krzysztof Kozlowski
2021-10-06 10:46 ` Sam Protsenko
2021-10-06 12:38 ` Krzysztof Kozlowski
2021-10-06 13:29 ` Sam Protsenko
2021-10-08 6:50 ` Krzysztof Kozlowski
2021-09-15 12:51 ` Sylwester Nawrocki
2021-10-06 11:18 ` Sam Protsenko
2021-10-06 12:45 ` Krzysztof Kozlowski
2021-10-09 18:49 ` Sylwester Nawrocki
2021-09-14 15:56 ` [PATCH 2/6] clk: samsung: clk-pll: Implement pll0822x PLL type Sam Protsenko
2021-09-15 8:24 ` Krzysztof Kozlowski
2021-09-15 15:59 ` Chanwoo Choi
2021-09-14 15:56 ` [PATCH 3/6] clk: samsung: clk-pll: Implement pll0831x " Sam Protsenko
2021-09-15 8:26 ` Krzysztof Kozlowski
2021-09-15 16:11 ` Chanwoo Choi
2021-09-14 15:56 ` [PATCH 4/6] dt-bindings: clock: Add bindings definitions for Exynos850 CMU Sam Protsenko
2021-09-15 8:27 ` Krzysztof Kozlowski
2021-09-15 16:37 ` Chanwoo Choi
2021-10-05 10:28 ` Sam Protsenko
2021-10-06 10:49 ` Krzysztof Kozlowski
2021-10-06 13:31 ` Sam Protsenko
2021-09-21 21:10 ` Rob Herring
2021-09-14 15:56 ` [PATCH 5/6] dt-bindings: clock: Document Exynos850 CMU bindings Sam Protsenko
2021-09-14 21:35 ` Rob Herring
2021-09-15 8:28 ` Krzysztof Kozlowski [this message]
2021-10-05 11:48 ` Sam Protsenko
2021-09-15 16:47 ` Chanwoo Choi
2021-09-14 15:56 ` [PATCH 6/6] clk: samsung: Introduce Exynos850 clock driver Sam Protsenko
2021-09-15 8:59 ` Krzysztof Kozlowski
2021-10-05 11:29 ` Sam Protsenko
2021-10-06 12:50 ` Krzysztof Kozlowski
2021-09-15 13:07 ` Sylwester Nawrocki
2021-10-05 11:36 ` Sam Protsenko
2021-10-06 12:46 ` Krzysztof Kozlowski
2021-09-15 18:04 ` Chanwoo Choi
2021-09-15 22:00 ` Sam Protsenko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b7fd881e-b027-fb87-3740-69cf00f795c0@canonical.com \
--to=krzysztof.kozlowski@canonical.com \
--cc=amit.pundir@linaro.org \
--cc=cw00.choi@samsung.com \
--cc=devicetree@vger.kernel.org \
--cc=john.stultz@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-samsung-soc@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=pawel.mikolaj.chmiel@gmail.com \
--cc=robh+dt@kernel.org \
--cc=ryu.real@samsung.com \
--cc=s.nawrocki@samsung.com \
--cc=sboyd@kernel.org \
--cc=semen.protsenko@linaro.org \
--cc=sumit.semwal@linaro.org \
--cc=tom.gall@linaro.org \
--cc=tomasz.figa@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).