[PATCH] clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume

* [PATCH] clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume
       [not found] <CGME20191025090212eucas1p10ef782af07e01470b185e4fb190d3ce6@eucas1p1.samsung.com>
@ 2019-10-25  9:02 ` Marek Szyprowski
  2019-10-25  9:21   ` Sylwester Nawrocki
  0 siblings, 1 reply; 2+ messages in thread
From: Marek Szyprowski @ 2019-10-25  9:02 UTC (permalink / raw)
  To: linux-clk, linux-samsung-soc
  Cc: Marek Szyprowski, Sylwester Nawrocki, Chanwoo Choi,
	Krzysztof Kozlowski, Bartlomiej Zolnierkiewicz,
	Marian Mihailescu

Properly save and restore all top PLL related configuration registers
during suspend/resume cycle. So far driver only handled EPLL and RPLL
clocks, all other were reset to default values after suspend/resume cycle.
This caused for example lower G3D (MALI Panfrost) performance after system
resume, even if performance governor has been selected.

Reported-by: Reported-by: Marian Mihailescu <mihailescu2m@gmail.com>
Fixes: 773424326b51 ("clk: samsung: exynos5420: add more registers to restore list")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 drivers/clk/samsung/clk-exynos5420.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index d2e06ce58fb5..0aca98492029 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -165,12 +165,18 @@ static const unsigned long exynos5x_clk_regs[] __initconst = {
 	GATE_BUS_CPU,
 	GATE_SCLK_CPU,
 	CLKOUT_CMU_CPU,
+	CPLL_CON0,
+	DPLL_CON0,
 	EPLL_CON0,
 	EPLL_CON1,
 	EPLL_CON2,
 	RPLL_CON0,
 	RPLL_CON1,
 	RPLL_CON2,
+	IPLL_CON0,
+	SPLL_CON0,
+	VPLL_CON0,
+	MPLL_CON0,
 	SRC_TOP0,
 	SRC_TOP1,
 	SRC_TOP2,
-- 
2.17.1


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