From: Kashyap Desai <kashyap.desai@broadcom.com>
To: linux-scsi@vger.kernel.org
Cc: jejb@linux.ibm.com, martin.petersen@oracle.com,
steve.hagan@broadcom.com, mpi3mr-linuxdrv.pdl@broadcom.com,
Kashyap Desai <kashyap.desai@broadcom.com>,
sathya.prakash@broadcom.com
Subject: [PATCH 4/7] mpi3mr: misc changes and use __builtin_return_address for debug
Date: Wed, 22 Sep 2021 00:15:57 +0530 [thread overview]
Message-ID: <20210921184600.64427-5-kashyap.desai@broadcom.com> (raw)
In-Reply-To: <20210921184600.64427-1-kashyap.desai@broadcom.com>
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No Functional changes.
Some minor variable name changes.
Use __builtin_return_address in some of the functions which are called
from multiple callers. Doing this we can avoid multiple debug prints.
Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
Cc: sathya.prakash@broadcom.com
---
drivers/scsi/mpi3mr/mpi3mr.h | 4 ++--
drivers/scsi/mpi3mr/mpi3mr_fw.c | 29 +++++++++++++++++------------
2 files changed, 19 insertions(+), 14 deletions(-)
diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h
index 5ae73927590c..391708c72563 100644
--- a/drivers/scsi/mpi3mr/mpi3mr.h
+++ b/drivers/scsi/mpi3mr/mpi3mr.h
@@ -121,7 +121,7 @@ extern int prot_mask;
/* Definitions for Event replies and sense buffer allocated per controller */
#define MPI3MR_NUM_EVT_REPLIES 64
-#define MPI3MR_SENSEBUF_SZ 256
+#define MPI3MR_SENSE_BUF_SZ 256
#define MPI3MR_SENSEBUF_FACTOR 3
#define MPI3MR_CHAINBUF_FACTOR 3
#define MPI3MR_CHAINBUFDIX_FACTOR 2
@@ -263,7 +263,7 @@ struct mpi3mr_ioc_facts {
u16 max_vds;
u16 max_hpds;
u16 max_advhpds;
- u16 max_raidpds;
+ u16 max_raid_pds;
u16 min_devhandle;
u16 max_devhandle;
u16 max_op_req_q;
diff --git a/drivers/scsi/mpi3mr/mpi3mr_fw.c b/drivers/scsi/mpi3mr/mpi3mr_fw.c
index 337cbb3ffaaa..7da07fe71cfe 100644
--- a/drivers/scsi/mpi3mr/mpi3mr_fw.c
+++ b/drivers/scsi/mpi3mr/mpi3mr_fw.c
@@ -1220,7 +1220,9 @@ int mpi3mr_admin_request_post(struct mpi3mr_ioc *mrioc, void *admin_req,
u8 *areq_entry;
if (mrioc->unrecoverable) {
- ioc_err(mrioc, "%s : Unrecoverable controller\n", __func__);
+ ioc_err(mrioc, "%ps %s error: Unrecoverable controller\n",
+ __builtin_return_address(0),
+ __func__);
return -EFAULT;
}
@@ -1230,12 +1232,16 @@ int mpi3mr_admin_request_post(struct mpi3mr_ioc *mrioc, void *admin_req,
max_entries = mrioc->num_admin_req;
if ((areq_ci == (areq_pi + 1)) || ((!areq_ci) &&
(areq_pi == (max_entries - 1)))) {
- ioc_err(mrioc, "AdminReqQ full condition detected\n");
+ ioc_err(mrioc, "%ps %s error: AdminReqQ full\n",
+ __builtin_return_address(0),
+ __func__);
retval = -EAGAIN;
goto out;
}
if (!ignore_reset && mrioc->reset_in_progress) {
- ioc_err(mrioc, "AdminReqQ submit reset in progress\n");
+ ioc_err(mrioc, "%ps %s error: AdminReqQ reset in progress\n",
+ __builtin_return_address(0),
+ __func__);
retval = -EAGAIN;
goto out;
}
@@ -2384,7 +2390,7 @@ static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc,
mrioc->facts.max_vds = le16_to_cpu(facts_data->max_vds);
mrioc->facts.max_hpds = le16_to_cpu(facts_data->max_host_pds);
mrioc->facts.max_advhpds = le16_to_cpu(facts_data->max_adv_host_pds);
- mrioc->facts.max_raidpds = le16_to_cpu(facts_data->max_raid_pds);
+ mrioc->facts.max_raid_pds = le16_to_cpu(facts_data->max_raid_pds);
mrioc->facts.max_nvme = le16_to_cpu(facts_data->max_nvme);
mrioc->facts.max_pcie_switches =
le16_to_cpu(facts_data->max_pcie_switches);
@@ -2421,10 +2427,9 @@ static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc,
mrioc->facts.ioc_num, mrioc->facts.max_op_req_q,
mrioc->facts.max_op_reply_q, mrioc->facts.max_devhandle);
ioc_info(mrioc,
- "maxreqs(%d), mindh(%d) maxPDs(%d) maxvectors(%d) maxperids(%d)\n",
+ "maxreqs(%d), mindh(%d) maxvectors(%d) maxperids(%d)\n",
mrioc->facts.max_reqs, mrioc->facts.min_devhandle,
- mrioc->facts.max_pds, mrioc->facts.max_msix_vectors,
- mrioc->facts.max_perids);
+ mrioc->facts.max_msix_vectors, mrioc->facts.max_perids);
ioc_info(mrioc, "SGEModMask 0x%x SGEModVal 0x%x SGEModShift 0x%x ",
mrioc->facts.sge_mod_mask, mrioc->facts.sge_mod_value,
mrioc->facts.sge_mod_shift);
@@ -2527,7 +2532,7 @@ static int mpi3mr_alloc_reply_sense_bufs(struct mpi3mr_ioc *mrioc)
goto out_failed;
/* sense buffer pool, 4 byte align */
- sz = mrioc->num_sense_bufs * MPI3MR_SENSEBUF_SZ;
+ sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ;
mrioc->sense_buf_pool = dma_pool_create("sense_buf pool",
&mrioc->pdev->dev, sz, 4, 0);
if (!mrioc->sense_buf_pool) {
@@ -2563,10 +2568,10 @@ static int mpi3mr_alloc_reply_sense_bufs(struct mpi3mr_ioc *mrioc)
"reply_free_q pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), reply_dma(0x%llx)\n",
mrioc->reply_free_q, mrioc->reply_free_qsz, 8, (sz / 1024),
(unsigned long long)mrioc->reply_free_q_dma);
- sz = mrioc->num_sense_bufs * MPI3MR_SENSEBUF_SZ;
+ sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ;
ioc_info(mrioc,
"sense_buf pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), sense_dma(0x%llx)\n",
- mrioc->sense_buf, mrioc->num_sense_bufs, MPI3MR_SENSEBUF_SZ,
+ mrioc->sense_buf, mrioc->num_sense_bufs, MPI3MR_SENSE_BUF_SZ,
(sz / 1024), (unsigned long long)mrioc->sense_buf_dma);
sz = mrioc->sense_buf_q_sz * 8;
ioc_info(mrioc,
@@ -2582,7 +2587,7 @@ static int mpi3mr_alloc_reply_sense_bufs(struct mpi3mr_ioc *mrioc)
/* initialize Sense Buffer Queue */
for (i = 0, phy_addr = mrioc->sense_buf_dma;
- i < mrioc->num_sense_bufs; i++, phy_addr += MPI3MR_SENSEBUF_SZ)
+ i < mrioc->num_sense_bufs; i++, phy_addr += MPI3MR_SENSE_BUF_SZ)
mrioc->sense_buf_q[i] = cpu_to_le64(phy_addr);
mrioc->sense_buf_q[i] = cpu_to_le64(0);
return retval;
@@ -2649,7 +2654,7 @@ static int mpi3mr_issue_iocinit(struct mpi3mr_ioc *mrioc)
iocinit_req.reply_free_queue_depth = cpu_to_le16(mrioc->reply_free_qsz);
iocinit_req.reply_free_queue_address =
cpu_to_le64(mrioc->reply_free_q_dma);
- iocinit_req.sense_buffer_length = cpu_to_le16(MPI3MR_SENSEBUF_SZ);
+ iocinit_req.sense_buffer_length = cpu_to_le16(MPI3MR_SENSE_BUF_SZ);
iocinit_req.sense_buffer_free_queue_depth =
cpu_to_le16(mrioc->sense_buf_q_sz);
iocinit_req.sense_buffer_free_queue_address =
--
2.18.1
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next prev parent reply other threads:[~2021-09-21 18:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-21 18:45 [PATCH 0/7] adding application support Kashyap Desai
2021-09-21 18:45 ` [PATCH 1/7] mpi3mr: upgrade mpi30 Rev-V Kashyap Desai
2021-09-21 18:45 ` [PATCH 2/7] miscdevice: adding support for MPI3MR_MINOR(243) Kashyap Desai
2021-10-05 4:27 ` Martin K. Petersen
2021-10-26 11:16 ` Kashyap Desai
2021-10-27 3:38 ` Martin K. Petersen
2021-10-28 18:34 ` Kashyap Desai
2021-12-13 12:23 ` [mpi3mr] " Sumit Saxena
2021-12-17 3:57 ` Martin K. Petersen
2021-09-21 18:45 ` [PATCH 3/7] mpi3mr: controller management application support Kashyap Desai
2021-09-21 18:45 ` Kashyap Desai [this message]
2021-09-21 18:45 ` [PATCH 5/7] mpi3mr: PEL support added Kashyap Desai
2021-09-21 18:45 ` [PATCH 6/7] mpi3mr: nvme pass-through support Kashyap Desai
2021-09-21 18:46 ` [PATCH 7/7] mpi3mr: task management for pass through command Kashyap Desai
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