linux-serial.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v2] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X
@ 2020-07-10 20:33 Matthew Howell
  2020-07-11  6:40 ` Greg KH
  0 siblings, 1 reply; 4+ messages in thread
From: Matthew Howell @ 2020-07-10 20:33 UTC (permalink / raw)
  To: gregkh; +Cc: linux-serial, jeff.baldwin, ryan.wenglarz, matthew.howell


From: Matthew Howell <mrhowel@g.clemson.edu>

Sealevel XR17V35X based devices are inoperable on kernel versions
4.11 and above due to a change in the GPIO preconfiguration introduced in commit
7dea8165f1d. This patch fixes this by preconfiguring the GPIO on Sealevel
cards to the value (0x00) used prior to commit 7dea8165f1d

Fixes: 7dea8165f1d ("serial: exar: Preconfigure xr17v35x MPIOs as output")
Signed-off-by: Matthew Howell <mrhowel@g.clemson.edu>
---

This is a revised patch submission based on comments received on
the previous submission.
See https://www.spinics.net/lists/linux-serial/msg39348.html

I am using a different email address to address the email footer issue,
and I have attempted to fix the formatting issues.

Summary/justification of the patch is below.

With GPIOs preconfigured as per commit 7dea8165f1d all ports on Sealevel
XR17V35X based devices become stuck in high impedance mode, regardless of
dip-switch or software configuration. This causes the device to become
effectively unusable. This patch (in various forms) has been distributed
to our customers and no issues related to it have been reported.

Let me know if any changes need to be made.

--- linux/drivers/tty/serial/8250/8250_exar.c.orig    2020-07-09 11:05:03.920060577 -0400
+++ linux/drivers/tty/serial/8250/8250_exar.c    2020-07-09 11:05:25.275891627 -0400
@@ -326,7 +326,7 @@ static void setup_gpio(struct pci_dev *p
      * devices will export them as GPIOs, so we pre-configure them safely
      * as inputs.
      */
-    u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
+    u8 dir = (pcidev->vendor == PCI_VENDOR_ID_EXAR && pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL) ? 0xff : 0x00;

     writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
     writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-07-21 19:07 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-10 20:33 [PATCH v2] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X Matthew Howell
2020-07-11  6:40 ` Greg KH
2020-07-13 16:26   ` Matthew Howell
2020-07-21 19:06     ` Greg KH

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).