From: Akash Asthana <akashast@codeaurora.org>
To: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org
Cc: linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, swboyd@chromium.org,
mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, mka@chromium.org,
dianders@chromium.org, evgreen@chromium.org,
Akash Asthana <akashast@codeaurora.org>
Subject: [PATCH V2 7/8] spi: spi-qcom-qspi: Add interconnect support
Date: Fri, 13 Mar 2020 18:42:13 +0530 [thread overview]
Message-ID: <1584105134-13583-8-git-send-email-akashast@codeaurora.org> (raw)
In-Reply-To: <1584105134-13583-1-git-send-email-akashast@codeaurora.org>
Get the interconnect paths for QSPI device and vote according to the
current bus speed of the driver.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
---
- As per Bjorn's comment, introduced and using devm_of_icc_get API for getting
path handle
- As per Matthias comment, added error handling for icc_set_bw call
drivers/spi/spi-qcom-qspi.c | 46 ++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c
index 3c4f83b..ad48f43 100644
--- a/drivers/spi/spi-qcom-qspi.c
+++ b/drivers/spi/spi-qcom-qspi.c
@@ -2,6 +2,7 @@
// Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
#include <linux/clk.h>
+#include <linux/interconnect.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -139,7 +140,10 @@ struct qcom_qspi {
struct device *dev;
struct clk_bulk_data *clks;
struct qspi_xfer xfer;
- /* Lock to protect xfer and IRQ accessed registers */
+ struct icc_path *icc_path_cpu_to_qspi;
+ unsigned int avg_bw_cpu;
+ unsigned int peak_bw_cpu;
+ /* Lock to protect data accessed by IRQs */
spinlock_t lock;
};
@@ -241,6 +245,20 @@ static int qcom_qspi_transfer_one(struct spi_master *master,
return ret;
}
+ /*
+ * Set BW quota for CPU as driver supports FIFO mode only.
+ * Assume peak bw as twice of avg bw.
+ */
+ ctrl->avg_bw_cpu = Bps_to_icc(speed_hz);
+ ctrl->peak_bw_cpu = Bps_to_icc(2 * speed_hz);
+ ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, ctrl->avg_bw_cpu,
+ ctrl->peak_bw_cpu);
+ if (ret) {
+ dev_err(ctrl->dev, "%s: ICC BW voting failed for cpu\n",
+ __func__);
+ return ret;
+ }
+
spin_lock_irqsave(&ctrl->lock, flags);
/* We are half duplex, so either rx or tx will be set */
@@ -458,6 +476,15 @@ static int qcom_qspi_probe(struct platform_device *pdev)
if (ret)
goto exit_probe_master_put;
+ ctrl->icc_path_cpu_to_qspi = devm_of_icc_get(dev, "qspi-config");
+ if (IS_ERR(ctrl->icc_path_cpu_to_qspi)) {
+ ret = PTR_ERR(ctrl->icc_path_cpu_to_qspi);
+ goto exit_probe_master_put;
+ }
+ /* Put BW vote on CPU path for register access */
+ ctrl->avg_bw_cpu = Bps_to_icc(1000);
+ ctrl->peak_bw_cpu = Bps_to_icc(1000);
+
ret = platform_get_irq(pdev, 0);
if (ret < 0)
goto exit_probe_master_put;
@@ -511,9 +538,17 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev)
{
struct spi_master *master = dev_get_drvdata(dev);
struct qcom_qspi *ctrl = spi_master_get_devdata(master);
+ int ret;
clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks);
+ ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, 0, 0);
+ if (ret) {
+ dev_err_ratelimited(ctrl->dev, "%s: ICC BW remove failed for cpu\n",
+ __func__);
+ return ret;
+ }
+
return 0;
}
@@ -521,6 +556,15 @@ static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev)
{
struct spi_master *master = dev_get_drvdata(dev);
struct qcom_qspi *ctrl = spi_master_get_devdata(master);
+ int ret;
+
+ ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, ctrl->avg_bw_cpu,
+ ctrl->peak_bw_cpu);
+ if (ret) {
+ dev_err_ratelimited(ctrl->dev, "%s: ICC BW voting failed for cpu\n",
+ __func__);
+ return ret;
+ }
return clk_bulk_prepare_enable(QSPI_NUM_CLKS, ctrl->clks);
}
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-03-13 13:14 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 13:12 [PATCH V2 0/8] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-03-13 13:12 ` [PATCH V2 1/8] interconnect: Add devm_of_icc_get() as exported API for users Akash Asthana
2020-03-13 16:26 ` Matthias Kaehlcke
2020-03-27 23:02 ` Bjorn Andersson
2020-03-13 13:12 ` [PATCH V2 2/8] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-03-13 16:42 ` Matthias Kaehlcke
2020-03-17 9:58 ` Akash Asthana
2020-03-17 19:06 ` Evan Green
[not found] ` <74851dda-296d-cdc5-2449-b9ec59bbc057@codeaurora.org>
2020-03-20 16:45 ` Evan Green
2020-03-27 5:33 ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 3/8] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-03-13 20:44 ` Matthias Kaehlcke
2020-03-17 10:57 ` Akash Asthana
2020-03-17 18:29 ` Matthias Kaehlcke
2020-03-18 8:54 ` Akash Asthana
2020-03-19 19:43 ` Matthias Kaehlcke
2020-03-20 10:22 ` Akash Asthana
2020-03-20 16:30 ` Evan Green
2020-03-27 5:04 ` Akash Asthana
2020-03-27 23:23 ` Bjorn Andersson
2020-03-31 10:55 ` Akash Asthana
2020-03-17 19:08 ` Evan Green
2020-03-17 19:46 ` Doug Anderson
2020-03-18 10:57 ` Akash Asthana
2020-03-18 16:22 ` Evan Green
2020-03-13 13:12 ` [PATCH V2 4/8] tty: serial: qcom_geni_serial: Add interconnect support Akash Asthana
2020-03-13 21:28 ` Matthias Kaehlcke
2020-03-17 11:48 ` Akash Asthana
2020-03-17 19:08 ` Matthias Kaehlcke
2020-03-18 12:23 ` Akash Asthana
2020-03-19 20:42 ` Matthias Kaehlcke
2020-03-20 10:35 ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 5/8] i2c: i2c-qcom-geni: " Akash Asthana
2020-03-14 0:17 ` Matthias Kaehlcke
2020-03-17 11:51 ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 6/8] spi: spi-geni-qcom: " Akash Asthana
2020-03-13 13:16 ` Mark Brown
2020-03-17 9:35 ` Akash Asthana
2020-03-17 13:06 ` Mark Brown
2020-03-20 13:52 ` Akash Asthana
2020-03-14 0:41 ` Matthias Kaehlcke
2020-03-17 12:11 ` Akash Asthana
2020-03-13 13:12 ` Akash Asthana [this message]
2020-03-14 0:58 ` [PATCH V2 7/8] spi: spi-qcom-qspi: " Matthias Kaehlcke
2020-03-17 12:13 ` Akash Asthana
2020-03-17 19:08 ` Evan Green
2020-03-18 13:48 ` Akash Asthana
2020-03-18 16:30 ` Evan Green
2020-03-20 5:35 ` Akash Asthana
2020-03-13 13:12 ` [PATCH V2 8/8] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
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