[PATCH v7 0/5] Add initial support for S32V234-EVB

[PATCH v7 0/5] Add initial support for S32V234-EVB

[Stefan-Gabriel Mirea]

Hello,

NXP's S32V234[1] ("Treerunner") vision microprocessors are targeted for
high-performance, computationally intensive vision and sensor fusion
applications that require automotive safety levels. They include leading
edge Camera Vision modules like APEX-2, ISP and GPU. The S32V234-EVB and
S32V234-SBC boards are available for customer evaluation.

The following patch series introduces minimal enablement support for the
NXP S32V234-EVB2[2] board, which leverages most of the SoC capabilities.
Up to v2, this series also included the fsl_linflexuart driver, which has
been included in Linux 5.4-rc1[3].

In the future, we aim to submit multiple drivers upstream, which can be
found in the kernel of our Auto Linux BSP[4] ("ALB"), starting with basic
pinmuxing, clock and uSDHC drivers.

For validation, you can use the U-Boot bootloader in the ALB[5], which we
build and test with our patched version of the Linaro GCC 6.3.1 2017.05
toolchain for ARM 64-bit, with sources available on [6].

Changes in v7:
* Rebase the patch 'serial: fsl_linflexuart: Be consistent with the name'
  on the tty-next branch in Greg's tty git tree.

Changes in v6:
* In the patch 'serial: fsl_linflexuart: Be consistent with the name',
  avoid updating the definition of PORT_LINFLEXUART; that was an
  independent fix which has been submitted and accepted[9] separately;
* Avoid using 'base64' as 'Content-Transfer-Encoding'.

Changes in v5:
* Remove the patch 'dt-bindings: serial: Document Freescale LINFlexD UART'
  following its acceptance in Linux 5.4-rc1[8];
* Rebase the other patches on v5.4-rc1.

Changes in v4:
* Remove the patch 'serial: fsl_linflexuart: Update compatible string'
  following its acceptance[7];
* Rebase the patch 'serial: fsl_linflexuart: Be consistent with the name'
  on the tty-next branch in Greg's tty git tree.

Changes in v3:
* Remove the patch 'tty: serial: Add linflexuart driver for S32V234'
  following its acceptance[3];
* Replace 'Freescale' with 'NXP' in the ARCH_S32 config definition and the
  'model' property from the device tree;
* Remove the 'fsl-' prefixes from the dtsi and dts file names;
* Move the 'model' property from (fsl-)s32v234.dtsi to s32v234-evb.dts;
* Add newlines between the cpu nodes in s32v234.dtsi;
* Make use of GIC_SPI, GIC_PPI, GIC_CPU_MASK_SIMPLE and IRQ_TYPE_* in the
  'interrupts' tuples;
* Move the 'timer' and 'interrupt-controller' nodes before 'soc' in
  s32v234.dtsi;
* Be consistent with the 'LINFlexD' spelling in documentation, strings and
  comments; add new patch 'serial: fsl_linflexuart: Be consistent with the
  name' to update the LINFlexD driver as well;
* Remove from fsl,s32-linflexuart.txt a statement regarding the limitation
  to UART mode;
* Make the compatible string SoC specific ("fsl,s32v234-linflexuart"); add
  new patch 'serial: fsl_linflexuart: Update compatible string' to update
  the LINFlexD driver as well;
* In the LINFlexD binding documentation, insert a space between label and
  node name and remove the 'status' property.

Changes in v2:
* Update the entry in fsl.yaml to apply to all S32V234 based boards;
* Add chosen node to dts, with a 'stdout-path' property for earlycon;
* Remove linflex_verify_port(), because it was only called from
  uart_set_info(), which was going to always fail at the "baud_base < 9600"
  check, as we are not using uartclk from uart_port yet;
* Fix compatible string used in OF_EARLYCON_DECLARE.

[1] https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/s32-automotive-platform/vision-processor-for-front-and-surround-view-camera-machine-learning-and-sensor-fusion:S32V234
[2] https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/ultra-reliable-dev-platforms/s32v-mpus-platforms/s32v-vision-and-sensor-fusion-evaluation-system:S32V234EVB
[3] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=09864c1cdf5c537bd01bff45181406e422ea988c
[4] https://source.codeaurora.org/external/autobsps32/linux/
[5] https://source.codeaurora.org/external/autobsps32/u-boot/
[6] https://source.codeaurora.org/external/s32ds/compiler/gcc/
[7] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2bd3661ea0eb2056852cbc58c5d96bb4df2f164f
[8] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0e16feab6cce2b91d2996d4bc4eff01ece577c4a
[9] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9050079719021776e48437827eb9d5986b6e45d4

Eddy Petrișor (1):
  dt-bindings: arm: fsl: Add the S32V234-EVB board

Mihaela Martinas (2):
  arm64: Introduce config for S32
  arm64: defconfig: Enable configs for S32V234

Stefan-Gabriel Mirea (1):
  serial: fsl_linflexuart: Be consistent with the name

Stoica Cosmin-Stefan (1):
  arm64: dts: fsl: Add device tree for S32V234-EVB

 .../admin-guide/kernel-parameters.txt         |   2 +-
 .../devicetree/bindings/arm/fsl.yaml          |   6 +
 arch/arm64/Kconfig.platforms                  |   5 +
 arch/arm64/boot/dts/freescale/Makefile        |   2 +
 arch/arm64/boot/dts/freescale/s32v234-evb.dts |  25 ++++
 arch/arm64/boot/dts/freescale/s32v234.dtsi    | 139 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   3 +
 drivers/tty/serial/Kconfig                    |   8 +-
 drivers/tty/serial/fsl_linflexuart.c          |   4 +-
 include/uapi/linux/serial_core.h              |   2 +-
 10 files changed, 188 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/s32v234-evb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/s32v234.dtsi

-- 
2.22.0

[PATCH v7 1/5] dt-bindings: arm: fsl: Add the S32V234-EVB board

[Stefan-Gabriel Mirea]

From: Eddy Petrișor <eddy.petrisor@nxp.com>

Add entry for the NXP S32V234 Customer Evaluation Board to the board/SoC
bindings.

Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 1b4b4e6573b5..c211f4f82e25 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -335,4 +335,10 @@ properties:
               - fsl,ls2088a-rdb
           - const: fsl,ls2088a
 
+      - description: S32V234 based Boards
+        items:
+          - enum:
+              - fsl,s32v234-evb           # S32V234-EVB2 Customer Evaluation Board
+          - const: fsl,s32v234
+
 ...
-- 
2.22.0

[PATCH v7 2/5] arm64: Introduce config for S32

[Stefan-Gabriel Mirea]

From: Mihaela Martinas <Mihaela.Martinas@freescale.com>

Add configuration option for the NXP S32 platform family in
Kconfig.platforms. For starters, the only SoC supported will be Treerunner
(S32V234), with a single execution target: the S32V234-EVB (rev 29288)
board.

Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
---
 arch/arm64/Kconfig.platforms | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 16d761475a86..17f1c34ec750 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -212,6 +212,11 @@ config ARCH_ROCKCHIP
 	  This enables support for the ARMv8 based Rockchip chipsets,
 	  like the RK3368.
 
+config ARCH_S32
+	bool "NXP S32 SoC Family"
+	help
+	  This enables support for the NXP S32 family of processors.
+
 config ARCH_SEATTLE
 	bool "AMD Seattle SoC Family"
 	help
-- 
2.22.0

[PATCH v7 3/5] serial: fsl_linflexuart: Be consistent with the name

[Stefan-Gabriel Mirea]

For consistency reasons, spell the controller name as "LINFlexD" in
comments and documentation.

Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
---
 Documentation/admin-guide/kernel-parameters.txt | 2 +-
 drivers/tty/serial/Kconfig                      | 8 ++++----
 drivers/tty/serial/fsl_linflexuart.c            | 4 ++--
 include/uapi/linux/serial_core.h                | 2 +-
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index a84a83f8881e..6dbd871493af 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1101,7 +1101,7 @@
 			mapped with the correct attributes.
 
 		linflex,<addr>
-			Use early console provided by Freescale LinFlex UART
+			Use early console provided by Freescale LINFlexD UART
 			serial driver for NXP S32V234 SoCs. A valid base
 			address must be provided, and the serial port must
 			already be setup and configured.
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 67a9eb3f94ce..c07c2667a2e4 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1392,19 +1392,19 @@ config SERIAL_FSL_LPUART_CONSOLE
 	  you can make it the console by answering Y to this option.
 
 config SERIAL_FSL_LINFLEXUART
-	tristate "Freescale linflexuart serial port support"
+	tristate "Freescale LINFlexD UART serial port support"
 	depends on PRINTK
 	select SERIAL_CORE
 	help
-	  Support for the on-chip linflexuart on some Freescale SOCs.
+	  Support for the on-chip LINFlexD UART on some Freescale SOCs.
 
 config SERIAL_FSL_LINFLEXUART_CONSOLE
-	bool "Console on Freescale linflexuart serial port"
+	bool "Console on Freescale LINFlexD UART serial port"
 	depends on SERIAL_FSL_LINFLEXUART=y
 	select SERIAL_CORE_CONSOLE
 	select SERIAL_EARLYCON
 	help
-	  If you have enabled the linflexuart serial port on the Freescale
+	  If you have enabled the LINFlexD UART serial port on the Freescale
 	  SoCs, you can make it the console by answering Y to this option.
 
 config SERIAL_CONEXANT_DIGICOLOR
diff --git a/drivers/tty/serial/fsl_linflexuart.c b/drivers/tty/serial/fsl_linflexuart.c
index a32f0d2afd59..205c31a61684 100644
--- a/drivers/tty/serial/fsl_linflexuart.c
+++ b/drivers/tty/serial/fsl_linflexuart.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /*
- * Freescale linflexuart serial port driver
+ * Freescale LINFlexD UART serial port driver
  *
  * Copyright 2012-2016 Freescale Semiconductor, Inc.
  * Copyright 2017-2019 NXP
@@ -940,5 +940,5 @@ static void __exit linflex_serial_exit(void)
 module_init(linflex_serial_init);
 module_exit(linflex_serial_exit);
 
-MODULE_DESCRIPTION("Freescale linflex serial port driver");
+MODULE_DESCRIPTION("Freescale LINFlexD serial port driver");
 MODULE_LICENSE("GPL v2");
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index e7fe550b6038..8ec3dd742ea4 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -290,7 +290,7 @@
 /* Sunix UART */
 #define PORT_SUNIX	121
 
-/* Freescale Linflex UART */
+/* Freescale LINFlexD UART */
 #define PORT_LINFLEXUART	122
 
 #endif /* _UAPILINUX_SERIAL_CORE_H */
-- 
2.22.0

[PATCH v7 4/5] arm64: dts: fsl: Add device tree for S32V234-EVB

[Stefan-Gabriel Mirea]

From: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>

Add initial version of device tree for S32V234-EVB, including nodes for the
4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and
Generic Interrupt Controller (GIC).

Keep SoC level separate from board level to let future boards with this SoC
share common properties, while the dts files will keep board-dependent
properties.

Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
---
 arch/arm64/boot/dts/freescale/Makefile        |   2 +
 arch/arm64/boot/dts/freescale/s32v234-evb.dts |  25 ++++
 arch/arm64/boot/dts/freescale/s32v234.dtsi    | 139 ++++++++++++++++++
 3 files changed, 166 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/s32v234-evb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/s32v234.dtsi

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 93fce8f0c66d..730209adb2bc 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -32,3 +32,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
+
+dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb
diff --git a/arch/arm64/boot/dts/freescale/s32v234-evb.dts b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
new file mode 100644
index 000000000000..4b802518cefc
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
+ */
+
+/dts-v1/;
+#include "s32v234.dtsi"
+
+/ {
+	model = "NXP S32V234-EVB2 Board";
+	compatible = "fsl,s32v234-evb", "fsl,s32v234";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
new file mode 100644
index 000000000000..37225191ccbf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2016-2018 NXP
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/memreserve/ 0x80000000 0x00010000;
+
+/ {
+	compatible = "fsl,s32v234";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x0>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80000000>;
+			next-level-cache = <&cluster0_l2_cache>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x1>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80000000>;
+			next-level-cache = <&cluster0_l2_cache>;
+		};
+
+		cpu2: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80000000>;
+			next-level-cache = <&cluster1_l2_cache>;
+		};
+
+		cpu3: cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80000000>;
+			next-level-cache = <&cluster1_l2_cache>;
+		};
+
+		cluster0_l2_cache: l2-cache0 {
+			compatible = "cache";
+		};
+
+		cluster1_l2_cache: l2-cache1 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>;
+		/* clock-frequency might be modified by u-boot, depending on the
+		 * chip version.
+		 */
+		clock-frequency = <10000000>;
+	};
+
+	gic: interrupt-controller@7d001000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x7d001000 0 0x1000>,
+		      <0 0x7d002000 0 0x2000>,
+		      <0 0x7d004000 0 0x2000>,
+		      <0 0x7d006000 0 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+					 IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		interrupt-parent = <&gic>;
+		ranges;
+
+		aips0: aips-bus@40000000 {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			interrupt-parent = <&gic>;
+			reg = <0x0 0x40000000 0x0 0x7D000>;
+			ranges;
+
+			uart0: serial@40053000 {
+				compatible = "fsl,s32v234-linflexuart";
+				reg = <0x0 0x40053000 0x0 0x1000>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+			};
+		};
+
+		aips1: aips-bus@40080000 {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			interrupt-parent = <&gic>;
+			reg = <0x0 0x40080000 0x0 0x70000>;
+			ranges;
+
+			uart1: serial@400bc000 {
+				compatible = "fsl,s32v234-linflexuart";
+				reg = <0x0 0x400bc000 0x0 0x1000>;
+				interrupts = <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+			};
+		};
+	};
+};
-- 
2.22.0

[PATCH v7 5/5] arm64: defconfig: Enable configs for S32V234

[Stefan-Gabriel Mirea]

From: Mihaela Martinas <Mihaela.Martinas@freescale.com>

Enable support for the S32V234 SoC, including the previously added UART
driver.

Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Adrian.Nitu <adrian.nitu@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
---
 arch/arm64/configs/defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c9a867ac32d4..bc14d95c1665 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -48,6 +48,7 @@ CONFIG_ARCH_MXC=y
 CONFIG_ARCH_QCOM=y
 CONFIG_ARCH_RENESAS=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ARCH_S32=y
 CONFIG_ARCH_SEATTLE=y
 CONFIG_ARCH_STRATIX10=y
 CONFIG_ARCH_SYNQUACER=y
@@ -352,6 +353,8 @@ CONFIG_SERIAL_XILINX_PS_UART=y
 CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
 CONFIG_SERIAL_FSL_LPUART=y
 CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+CONFIG_SERIAL_FSL_LINFLEXUART=y
+CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
 CONFIG_SERIAL_MVEBU_UART=y
 CONFIG_SERIAL_DEV_BUS=y
 CONFIG_VIRTIO_CONSOLE=y
-- 
2.22.0

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Greg KH]

On Wed, Oct 16, 2019 at 03:48:22PM +0300, Stefan-Gabriel Mirea wrote:
> Hello,
> 
> NXP's S32V234[1] ("Treerunner") vision microprocessors are targeted for
> high-performance, computationally intensive vision and sensor fusion
> applications that require automotive safety levels. They include leading
> edge Camera Vision modules like APEX-2, ISP and GPU. The S32V234-EVB and
> S32V234-SBC boards are available for customer evaluation.
> 
> The following patch series introduces minimal enablement support for the
> NXP S32V234-EVB2[2] board, which leverages most of the SoC capabilities.
> Up to v2, this series also included the fsl_linflexuart driver, which has
> been included in Linux 5.4-rc1[3].
> 
> In the future, we aim to submit multiple drivers upstream, which can be
> found in the kernel of our Auto Linux BSP[4] ("ALB"), starting with basic
> pinmuxing, clock and uSDHC drivers.
> 
> For validation, you can use the U-Boot bootloader in the ALB[5], which we
> build and test with our patched version of the Linaro GCC 6.3.1 2017.05
> toolchain for ARM 64-bit, with sources available on [6].
> 
> Changes in v7:
> * Rebase the patch 'serial: fsl_linflexuart: Be consistent with the name'
>   on the tty-next branch in Greg's tty git tree.

I've taken patch 3 in my tty-next tree.  The others should probably go
through an arm-specific tree, right?

thanks,

greg k-h

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Stefan-gabriel Mirea]

On 10/16/2019 4:17 PM, Greg KH wrote:
> 
> I've taken patch 3 in my tty-next tree.  The others should probably go
> through an arm-specific tree, right?

Thank you very much, Greg! That was all for the tty tree.

I think that the other patches should go to the following trees:
* git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git:
    patches #1 and possibly #4 (as it covers arch/*/boot/dts/);
* git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git:
    patches #2, #5 and possibly #4 (as it covers arch/arm64/boot/dts/)
* git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
    possibly patch #4 (as it covers arch/arm64/boot/dts/freescale/fsl-*)

As a general question, would it be any chance to have the device tree
included in v5.4 (along with its compatible documentation and config
definition, without enablement)? That is, only the patches #1, #2 and
#4, because #3 is a cosmetic change and #5 enables the new configs by
default. That would complete a minimal support for S32V234-EVB, together
with the LINFlexD UART driver which was accepted.

From the development process documentation[1]: "An occasional exception
is made for drivers for previously-unsupported hardware; if they touch
no in-tree code, they cannot cause regressions and should be safe to add
at any time".

I know that it mentions only drivers and not device trees, but from the
history is seems that there have also been dts/dtsi files added outside
of merge windows, such as:
* arch/riscv/boot/dts/sifive/fu540-c000.dtsi;
* arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts;
* arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts;
* arch/xtensa/boot/dts/lx200mx.dts;
* arch/xtensa/boot/dts/kc705.dts;
* arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi;
* arch/arm/boot/dts/omap3-beagle-xm-ab.dts;
* arch/arm/boot/dts/at91-sama5d3_xplained.dts;
* arch/arm/boot/dts/am335x-boneblack.dts;
* arch/powerpc/boot/dts/charon.dts.

I am sorry if my question is inopportune, I am definitely not trying to
rush anyone. I just ask because this has been under review for some
time and all the feedback has been addressed. We would really appreciate
to have this SoC and board supported in the following LTS release if
there are no other issues.

Regards,
Stefan

[1] https://www.kernel.org/doc/html/v5.3/process/2.Process.html

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 04:54:58PM +0000, Stefan-gabriel Mirea wrote:
> On 10/16/2019 4:17 PM, Greg KH wrote:
> > 
> > I've taken patch 3 in my tty-next tree.  The others should probably go
> > through an arm-specific tree, right?
> 
> Thank you very much, Greg! That was all for the tty tree.
> 
> I think that the other patches should go to the following trees:
> * git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git:
>     patches #1 and possibly #4 (as it covers arch/*/boot/dts/);
> * git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git:
>     patches #2, #5 and possibly #4 (as it covers arch/arm64/boot/dts/)
> * git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
>     possibly patch #4 (as it covers arch/arm64/boot/dts/freescale/fsl-*)
> 
> As a general question, would it be any chance to have the device tree
> included in v5.4 (along with its compatible documentation and config
> definition, without enablement)? That is, only the patches #1, #2 and
> #4, because #3 is a cosmetic change and #5 enables the new configs by
> default. That would complete a minimal support for S32V234-EVB, together
> with the LINFlexD UART driver which was accepted.
> 
> From the development process documentation[1]: "An occasional exception
> is made for drivers for previously-unsupported hardware; if they touch
> no in-tree code, they cannot cause regressions and should be safe to add
> at any time".
> 
> I know that it mentions only drivers and not device trees, but from the
> history is seems that there have also been dts/dtsi files added outside
> of merge windows, such as:
> * arch/riscv/boot/dts/sifive/fu540-c000.dtsi;
> * arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts;
> * arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts;
> * arch/xtensa/boot/dts/lx200mx.dts;
> * arch/xtensa/boot/dts/kc705.dts;
> * arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi;
> * arch/arm/boot/dts/omap3-beagle-xm-ab.dts;
> * arch/arm/boot/dts/at91-sama5d3_xplained.dts;
> * arch/arm/boot/dts/am335x-boneblack.dts;
> * arch/powerpc/boot/dts/charon.dts.
> 
> I am sorry if my question is inopportune, I am definitely not trying to
> rush anyone. I just ask because this has been under review for some
> time and all the feedback has been addressed. We would really appreciate
> to have this SoC and board supported in the following LTS release if
> there are no other issues.

Sorry, no.  It happens occasionally that non-fixing patches are merged
during -rc time, mostly because they are supposed to land mainline
during merge window, but missed the window for some reason, like
subsystem maintainers did not send pull request to Linus in time.
Also the patches are only taken in early -rc like rc2.

Shawn

Re: [PATCH v7 4/5] arm64: dts: fsl: Add device tree for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 03:48:26PM +0300, Stefan-Gabriel Mirea wrote:
> From: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
> 
> Add initial version of device tree for S32V234-EVB, including nodes for the
> 4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and
> Generic Interrupt Controller (GIC).
> 
> Keep SoC level separate from board level to let future boards with this SoC
> share common properties, while the dts files will keep board-dependent
> properties.
> 
> Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
> Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
> Signed-off-by: Dan Nica <dan.nica@nxp.com>
> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
> Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/Makefile        |   2 +
>  arch/arm64/boot/dts/freescale/s32v234-evb.dts |  25 ++++
>  arch/arm64/boot/dts/freescale/s32v234.dtsi    | 139 ++++++++++++++++++
>  3 files changed, 166 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/s32v234-evb.dts
>  create mode 100644 arch/arm64/boot/dts/freescale/s32v234.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 93fce8f0c66d..730209adb2bc 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -32,3 +32,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
> +
> +dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb
> diff --git a/arch/arm64/boot/dts/freescale/s32v234-evb.dts b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
> new file mode 100644
> index 000000000000..4b802518cefc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright 2015-2016 Freescale Semiconductor, Inc.
> + * Copyright 2016-2017 NXP
> + */
> +
> +/dts-v1/;
> +#include "s32v234.dtsi"
> +
> +/ {
> +	model = "NXP S32V234-EVB2 Board";
> +	compatible = "fsl,s32v234-evb", "fsl,s32v234";
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> new file mode 100644
> index 000000000000..37225191ccbf
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright 2015-2016 Freescale Semiconductor, Inc.
> + * Copyright 2016-2018 NXP
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/memreserve/ 0x80000000 0x00010000;
> +
> +/ {
> +	compatible = "fsl,s32v234";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x0>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster0_l2_cache>;
> +		};
> +
> +		cpu1: cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x1>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster0_l2_cache>;
> +		};
> +
> +		cpu2: cpu@100 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x100>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster1_l2_cache>;
> +		};
> +
> +		cpu3: cpu@101 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x101>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster1_l2_cache>;
> +		};
> +
> +		cluster0_l2_cache: l2-cache0 {
> +			compatible = "cache";
> +		};
> +
> +		cluster1_l2_cache: l2-cache1 {
> +			compatible = "cache";
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>;
> +		/* clock-frequency might be modified by u-boot, depending on the
> +		 * chip version.
> +		 */
> +		clock-frequency = <10000000>;
> +	};
> +
> +	gic: interrupt-controller@7d001000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupt-controller;
> +		reg = <0 0x7d001000 0 0x1000>,
> +		      <0 0x7d002000 0 0x2000>,
> +		      <0 0x7d004000 0 0x2000>,
> +		      <0 0x7d006000 0 0x2000>;
> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> +					 IRQ_TYPE_LEVEL_HIGH)>;
> +	};
> +
> +	soc {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		compatible = "simple-bus";
> +		interrupt-parent = <&gic>;
> +		ranges;
> +
> +		aips0: aips-bus@40000000 {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			interrupt-parent = <&gic>;
> +			reg = <0x0 0x40000000 0x0 0x7D000>;

We should consistently use lowercase for hex values in device tree.

I fixed it up during applying.

Shawn

> +			ranges;
> +
> +			uart0: serial@40053000 {
> +				compatible = "fsl,s32v234-linflexuart";
> +				reg = <0x0 0x40053000 0x0 0x1000>;
> +				interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
> +				status = "disabled";
> +			};
> +		};
> +
> +		aips1: aips-bus@40080000 {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			interrupt-parent = <&gic>;
> +			reg = <0x0 0x40080000 0x0 0x70000>;
> +			ranges;
> +
> +			uart1: serial@400bc000 {
> +				compatible = "fsl,s32v234-linflexuart";
> +				reg = <0x0 0x400bc000 0x0 0x1000>;
> +				interrupts = <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>;
> +				status = "disabled";
> +			};
> +		};
> +	};
> +};
> -- 
> 2.22.0
> 

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 03:48:22PM +0300, Stefan-Gabriel Mirea wrote:
> Eddy Petrișor (1):
>   dt-bindings: arm: fsl: Add the S32V234-EVB board
> 
> Mihaela Martinas (2):
>   arm64: Introduce config for S32
>   arm64: defconfig: Enable configs for S32V234
...
> Stoica Cosmin-Stefan (1):
>   arm64: dts: fsl: Add device tree for S32V234-EVB

Applied these 4, thanks.

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Stefan-gabriel Mirea]

Hello Shawn,

On 10/26/2019 4:27 PM, Shawn Guo wrote:
> 
> Sorry, no.  It happens occasionally that non-fixing patches are merged
> during -rc time, mostly because they are supposed to land mainline
> during merge window, but missed the window for some reason, like
> subsystem maintainers did not send pull request to Linus in time.
> Also the patches are only taken in early -rc like rc2.
> 

Okay, thank you for your clarification!

Regards,
Stefan