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From: Matthias Kaehlcke <mka@chromium.org>
To: Akash Asthana <akashast@codeaurora.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
	bjorn.andersson@linaro.org, wsa@the-dreams.de,
	broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
	georgi.djakov@linaro.org, linux-i2c@vger.kernel.org,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	swboyd@chromium.org, mgautam@codeaurora.org,
	linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org,
	dianders@chromium.org, evgreen@chromium.org
Subject: Re: [PATCH V4 7/9] tty: serial: qcom_geni_serial: Add interconnect support
Date: Thu, 16 Apr 2020 10:17:43 -0700	[thread overview]
Message-ID: <20200416171743.GC199755@google.com> (raw)
In-Reply-To: <1586946198-13912-8-git-send-email-akashast@codeaurora.org>

On Wed, Apr 15, 2020 at 03:53:16PM +0530, Akash Asthana wrote:
> Get the interconnect paths for Uart based Serial Engine device
> and vote according to the baud rate requirement of the driver.
> 
> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
> ---
> Changes in V2:
>  - As per Bjorn's comment, removed se == NULL check from geni_serial_icc_get
>  - As per Bjorn's comment, removed code to set se->icc_path* to NULL in failure
>  - As per Bjorn's comment, introduced and using devm_of_icc_get API for getting
>    path handle
>  - As per Matthias comment, added error handling for icc_set_bw call
> 
> Changes in V3:
>  - As per Matthias comment, use common library APIs defined in geni-se
>    driver for ICC functionality.
> 
> Changes in V4:
>  - As per Mark's comment move peak_bw guess as twice of avg_bw if
>    nothing mentioned explicitly to ICC core.
>  - As per Matthias's comment select core clock BW based on baud rate.
>    If it's less than 115200 go for GENI_DEFAULT_BW else CORE_2X_50_MHZ
> 
>  drivers/tty/serial/qcom_geni_serial.c | 25 ++++++++++++++++++++++---
>  1 file changed, 22 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index 8c5d97c..a5b2f1c 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -965,6 +965,15 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
>  	ser_clk_cfg = SER_CLK_EN;
>  	ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
>  
> +	/*
> +	 * Bump up BW vote on CPU and CORE path as driver supports FIFO mode
> +	 * only.
> +	 */
> +	port->se.icc_paths[0].avg_bw = (baud > 115200) ?
> +				Bps_to_icc(CORE_2X_50_MHZ) : GENI_DEFAULT_BW;
> +	port->se.icc_paths[1].avg_bw = Bps_to_icc(baud);

use enums to index the paths

> +	geni_icc_vote_on(&port->se);
> +
>  	/* parity */
>  	tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG);
>  	tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG);
> @@ -1202,11 +1211,14 @@ static void qcom_geni_serial_pm(struct uart_port *uport,
>  	if (old_state == UART_PM_STATE_UNDEFINED)
>  		old_state = UART_PM_STATE_OFF;
>  
> -	if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF)
> +	if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) {
> +		geni_icc_vote_on(&port->se);
>  		geni_se_resources_on(&port->se);
> -	else if (new_state == UART_PM_STATE_OFF &&
> -			old_state == UART_PM_STATE_ON)
> +	} else if (new_state == UART_PM_STATE_OFF &&
> +			old_state == UART_PM_STATE_ON) {
>  		geni_se_resources_off(&port->se);
> +		geni_icc_vote_off(&port->se);
> +	}
>  }
>  
>  static const struct uart_ops qcom_geni_console_pops = {
> @@ -1304,6 +1316,13 @@ static int qcom_geni_serial_probe(struct platform_device *pdev)
>  			return -ENOMEM;
>  	}
>  
> +	ret = geni_icc_get(&port->se, NULL);
> +	if (ret)
> +		return ret;
> +	/* Set the bus quota to a reasonable value for register access */
> +	port->se.icc_paths[0].avg_bw = GENI_DEFAULT_BW;
> +	port->se.icc_paths[1].avg_bw = GENI_DEFAULT_BW;

The comment isn't very useful, the use of GENI_DEFAULT_BW essentially
implies "a reasonable value". I suggest to drop it.

  reply	other threads:[~2020-04-16 17:17 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-15 10:23 [PATCH V4 0/9] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-04-15 10:23 ` [PATCH V4 1/9] interconnect: Add devm_of_icc_get() as exported API for users Akash Asthana
2020-04-28 16:04   ` Georgi Djakov
2020-04-15 10:23 ` [PATCH V4 2/9] interconnect: Set peak requirement as twice of average Akash Asthana
2020-04-23  9:31   ` Georgi Djakov
2020-04-28  9:46     ` Akash Asthana
2020-04-28 10:53       ` Georgi Djakov
2020-04-15 10:23 ` [PATCH V4 3/9] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-04-15 23:36   ` Matthias Kaehlcke
2020-04-28  9:48     ` Akash Asthana
2020-04-15 10:23 ` [PATCH V4 4/9] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-04-16  0:31   ` Matthias Kaehlcke
2020-04-28 10:21     ` Akash Asthana
2020-04-28 15:48       ` Matthias Kaehlcke
2020-04-15 10:23 ` [PATCH V4 5/9] i2c: i2c-qcom-geni: Add interconnect support Akash Asthana
2020-04-16 17:09   ` Matthias Kaehlcke
2020-04-15 10:23 ` [PATCH V4 6/9] spi: spi-geni-qcom: " Akash Asthana
2020-04-15 11:39   ` Mark Brown
2020-04-15 10:23 ` [PATCH V4 7/9] tty: serial: qcom_geni_serial: " Akash Asthana
2020-04-16 17:17   ` Matthias Kaehlcke [this message]
2020-04-15 10:23 ` [PATCH V4 8/9] spi: spi-qcom-qspi: " Akash Asthana
2020-04-15 10:23 ` [PATCH V4 9/9] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana

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