From: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
To: <vkoul@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <joel@jms.id.au>,
<andrew@aj.id.au>, <gregkh@linuxfoundation.org>,
<jirislaby@kernel.org>, <pmenzel@molgen.mpg.de>,
<ilpo.jarvinen@linux.intel.com>, <hdanton@sina.com>,
<dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>,
<linux-serial@vger.kernel.org>, <openbmc@lists.ozlabs.org>
Subject: [PATCH v3 2/5] dt-bindings: dmaengine: Add AST2600 UDMA bindings
Date: Mon, 20 Mar 2023 16:11:30 +0800 [thread overview]
Message-ID: <20230320081133.23655-3-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20230320081133.23655-1-chiawei_wang@aspeedtech.com>
Add the dmaengine bindings for the UART DMA engine of Aspeed AST2600 SoC.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
.../bindings/dma/aspeed,ast2600-udma.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/aspeed,ast2600-udma.yaml
diff --git a/Documentation/devicetree/bindings/dma/aspeed,ast2600-udma.yaml b/Documentation/devicetree/bindings/dma/aspeed,ast2600-udma.yaml
new file mode 100644
index 000000000000..4c0a5edf2168
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/aspeed,ast2600-udma.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/aspeed,ast2600-udma.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Aspeed AST2600 UART DMA controller
+
+maintainers:
+ - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+
+description:
+ The Aspeed AST2600 UDMA controller provides direct memory access capabilities
+ for the NS16550A-compatible UART devices inside AST2600 SoCs. UDMA supports 28
+ DMA channels and each UART device has its dedicated pair of TX and RX channels.
+
+allOf:
+ - $ref: dma-controller.yaml#
+
+properties:
+ compatible:
+ const: aspeed,ast2600-udma
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#dma-cells":
+ const: 1
+
+ dma-channels:
+ maximum: 28
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#dma-cells"
+ - dma-channels
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ dma-controller@1e79e000 {
+ compatible = "aspeed,ast2600-udma";
+ reg = <0x1e79e000 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ dma-channels = <28>;
+ #dma-cells = <1>;
+ };
+
+...
--
2.25.1
next prev parent reply other threads:[~2023-03-20 8:11 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 8:11 [PATCH v3 0/5] arm: aspeed: Add UART DMA support Chia-Wei Wang
2023-03-20 8:11 ` [PATCH v3 1/5] dt-bindings: serial: 8250: Add aspeed,ast2600-uart Chia-Wei Wang
2023-03-20 8:11 ` Chia-Wei Wang [this message]
2023-03-21 21:32 ` [PATCH v3 2/5] dt-bindings: dmaengine: Add AST2600 UDMA bindings Rob Herring
2023-03-20 8:11 ` [PATCH v3 3/5] dmaengine: aspeed: Add AST2600 UART DMA driver Chia-Wei Wang
2023-03-20 11:14 ` Ilpo Järvinen
2023-03-22 8:34 ` ChiaWei Wang
2023-03-20 8:11 ` [PATCH v3 4/5] serial: 8250: Add AST2600 UART driver Chia-Wei Wang
2023-03-20 9:42 ` Ilpo Järvinen
2023-03-20 10:19 ` ChiaWei Wang
2023-03-20 10:48 ` Ilpo Järvinen
2023-03-22 8:34 ` ChiaWei Wang
2023-03-20 8:11 ` [PATCH v3 5/5] ARM: dts: aspeed-g6: Add UDMA node Chia-Wei Wang
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