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From: Conor Dooley <conor@kernel.org>
To: Icenowy Zheng <uwu@icenowy.me>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Jiri Slaby <jirislaby@kernel.org>,
	linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 5/7] riscv: dts: bouffalolab: add the bl808 SoC base device tree
Date: Sun, 20 Nov 2022 14:28:06 +0000	[thread overview]
Message-ID: <Y3o5dqPX7ScTs9qj@spud> (raw)
In-Reply-To: <32ffd3f857ce9c08462ce8a7b2e40871c2f2c275.camel@icenowy.me>

On Sun, Nov 20, 2022 at 07:58:56PM +0800, Icenowy Zheng wrote:
> 在 2022-11-20星期日的 11:02 +0000,Conor Dooley写道:
> > On Sun, Nov 20, 2022 at 04:21:12PM +0800, Jisheng Zhang wrote:
> > > Add a baisc dtsi for the bouffalolab bl808 SoC.

> > > +               plic: interrupt-controller@e0000000 {
> > > +                       compatible = "thead,c900-plic";
> > 
> > Hmm, this one fails validation too. Likely you need to add a
> > "bouffalolab,plic" to the plic dt-binding or otherwise modify the
> > binding such that thead,c900-plic on it's own is permitted. CC Samuel
> > on
> > that patch please in case he has an opinion on it.
> 
> Personally I prefer a single c900-plic in compatible, because the PLIC
> doesn't look so configurable in C906/C910 (the interrupt source number
> is really adjustable, but it's already in the riscv,ndev property).

Right, if all implementations are going to be identical (modulo the
riscv,ndev) allowing thead,c900-plic in isolation makes sense to me.
I had a bit of a check in the history & it looks like there was no 
explanation given for why the D1 needed a specific compatible (although
there's no harm in having one in case something comes up in the future
that'd require special handling for a given implementation).


  reply	other threads:[~2022-11-20 14:28 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-20  8:21 [PATCH 0/7] riscv: add Bouffalolab bl808 support Jisheng Zhang
2022-11-20  8:21 ` [PATCH 1/7] dt-bindings: serial: add bindings doc for Bouffalolab uart driver Jisheng Zhang
2022-11-21 10:08   ` Krzysztof Kozlowski
2022-11-30 18:04   ` Rob Herring
2022-11-20  8:21 ` [PATCH 2/7] serial: bflb_uart: add Bouffalolab UART Driver Jisheng Zhang
2022-11-21  8:09   ` Jiri Slaby
2022-11-21 13:59   ` Ilpo Järvinen
2022-11-20  8:21 ` [PATCH 3/7] MAINTAINERS: add myself as a reviewer for Bouffalolab uart driver Jisheng Zhang
2022-11-20  8:21 ` [PATCH 4/7] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2022-11-20 10:43   ` Conor Dooley
2022-11-20  8:21 ` [PATCH 5/7] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2022-11-20 11:02   ` Conor Dooley
2022-11-20 11:58     ` Icenowy Zheng
2022-11-20 14:28       ` Conor Dooley [this message]
2022-11-20 14:57   ` Emil Renner Berthing
2022-11-20 17:51     ` Conor Dooley
2022-11-20 18:33       ` Emil Renner Berthing
2022-11-21  3:36     ` Icenowy Zheng
2022-11-21 11:25       ` Emil Renner Berthing
2022-11-21 10:09   ` Krzysztof Kozlowski
2022-11-20  8:21 ` [PATCH 6/7] riscv: dts: bouffalolab: add Sipeed M1S dock devicetree Jisheng Zhang
2022-11-20 11:09   ` Conor Dooley
2022-11-20 11:57   ` Icenowy Zheng
2022-11-20 15:06   ` Emil Renner Berthing
2022-11-21 10:10   ` Krzysztof Kozlowski
2022-11-20  8:21 ` [PATCH 7/7] MAINTAINERS: add myself as Bouffalolab SoC entry maintainer Jisheng Zhang
2022-11-21 10:11   ` Krzysztof Kozlowski

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