From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Mon, 5 Nov 2018 16:31:40 +0200 From: Andy Shevchenko To: Jarkko Sakkinen CC: "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Platform Driver , , Dave Hansen , , , , , , , , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Konrad Rzeszutek Wilk , "David Woodhouse" , , "Kirill A. Shutemov" , "Levin, Alexander (Sasha Levin)" , , "Linux Kernel Mailing List" Subject: Re: [PATCH v15 05/23] x86/cpu/intel: Detect SGX support and update caps appropriately Message-ID: <20181105143140.GJ10650@smile.fi.intel.com> References: <20181102231320.29164-1-jarkko.sakkinen@linux.intel.com> <20181102231320.29164-6-jarkko.sakkinen@linux.intel.com> <20181105140933.GA24038@linux.intel.com> Content-Type: text/plain; charset="us-ascii" In-Reply-To: <20181105140933.GA24038@linux.intel.com> Return-Path: andy.shevchenko@gmail.com MIME-Version: 1.0 List-ID: On Mon, Nov 05, 2018 at 04:09:33PM +0200, Jarkko Sakkinen wrote: > On Sat, Nov 03, 2018 at 03:05:39PM +0200, Andy Shevchenko wrote: > Agree. Would this be a more clean flow in the attached patch? LGTM. > From 3b863a7db00cefffc15df918a5132c35ea313c27 Mon Sep 17 00:00:00 2001 > From: Jarkko Sakkinen > Date: Mon, 5 Nov 2018 16:06:06 +0200 > Subject: [PATCH] x86/cpu/intel: clean up detect_sgx() flow > > Signed-off-by: Jarkko Sakkinen > --- > arch/x86/kernel/cpu/intel.c | 32 ++++++++++++++++++++------------ > 1 file changed, 20 insertions(+), 12 deletions(-) > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index bc52c52f7025..8a20a193d399 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -598,28 +598,36 @@ static void detect_tme(struct cpuinfo_x86 *c) > > static void detect_sgx(struct cpuinfo_x86 *c) > { > - bool unsupported = false; > unsigned long long fc; > > rdmsrl(MSR_IA32_FEATURE_CONTROL, fc); > if (!(fc & FEATURE_CONTROL_LOCKED)) { > pr_err_once("sgx: IA32_FEATURE_CONTROL MSR is not locked\n"); > - unsupported = true; > - } else if (!(fc & FEATURE_CONTROL_SGX_ENABLE)) { > + goto out_unsupported; > + } > + > + if (!(fc & FEATURE_CONTROL_SGX_ENABLE)) { > pr_err_once("sgx: not enabled in IA32_FEATURE_CONTROL MSR\n"); > - unsupported = true; > - } else if (!cpu_has(c, X86_FEATURE_SGX1)) { > + goto out_unsupported; > + } > + > + if (!cpu_has(c, X86_FEATURE_SGX1)) { > pr_err_once("sgx: SGX1 instruction set not supported\n"); > - unsupported = true; > + goto out_unsupported; > } > > - if (unsupported) { > - setup_clear_cpu_cap(X86_FEATURE_SGX); > - setup_clear_cpu_cap(X86_FEATURE_SGX1); > - setup_clear_cpu_cap(X86_FEATURE_SGX2); > + if (!(fc & FEATURE_CONTROL_SGX_LE_WR)) { > + pr_info_once("sgx: launch control MSRs are not writable\n"); > + goto out_msrs_rdonly; > } > - if (unsupported || !(fc & FEATURE_CONTROL_SGX_LE_WR)) > - setup_clear_cpu_cap(X86_FEATURE_SGX_LC); > + > + return; > +out_unsupported: > + setup_clear_cpu_cap(X86_FEATURE_SGX); > + setup_clear_cpu_cap(X86_FEATURE_SGX1); > + setup_clear_cpu_cap(X86_FEATURE_SGX2); > +out_msrs_rdonly: > + setup_clear_cpu_cap(X86_FEATURE_SGX_LC); > } > > static void init_intel_energy_perf(struct cpuinfo_x86 *c) > -- > 2.19.1 > -- With Best Regards, Andy Shevchenko From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5383C0044C for ; Mon, 5 Nov 2018 14:31:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A8FBF2085A for ; Mon, 5 Nov 2018 14:31:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A8FBF2085A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-sgx-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727575AbeKEXvr (ORCPT ); Mon, 5 Nov 2018 18:51:47 -0500 Received: from mga11.intel.com ([192.55.52.93]:5880 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726173AbeKEXvr (ORCPT ); Mon, 5 Nov 2018 18:51:47 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Nov 2018 06:31:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,468,1534834800"; d="scan'208";a="278451650" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.86]) by fmsmga006.fm.intel.com with ESMTP; 05 Nov 2018 06:31:42 -0800 Received: from andy by smile with local (Exim 4.91) (envelope-from ) id 1gJfum-0005l3-Gz; Mon, 05 Nov 2018 16:31:40 +0200 Date: Mon, 5 Nov 2018 16:31:40 +0200 From: Andy Shevchenko To: Jarkko Sakkinen Cc: "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Platform Driver , linux-sgx@vger.kernel.org, Dave Hansen , sean.j.christopherson@intel.com, nhorman@redhat.com, npmccallum@redhat.com, serge.ayoun@intel.com, shay.katz-zamir@intel.com, haitao.huang@intel.com, mark.shanahan@intel.com, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Konrad Rzeszutek Wilk , David Woodhouse , davidwang@zhaoxin.com, "Kirill A. Shutemov" , "Levin, Alexander (Sasha Levin)" , qianyue.zj@alibaba-inc.com, Linux Kernel Mailing List Subject: Re: [PATCH v15 05/23] x86/cpu/intel: Detect SGX support and update caps appropriately Message-ID: <20181105143140.GJ10650@smile.fi.intel.com> References: <20181102231320.29164-1-jarkko.sakkinen@linux.intel.com> <20181102231320.29164-6-jarkko.sakkinen@linux.intel.com> <20181105140933.GA24038@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181105140933.GA24038@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-sgx-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sgx@vger.kernel.org Message-ID: <20181105143140.BOFWmVIUFHAK95C6UWyYQLwyuo-o1kfOXcx7Da-Wo0M@z> On Mon, Nov 05, 2018 at 04:09:33PM +0200, Jarkko Sakkinen wrote: > On Sat, Nov 03, 2018 at 03:05:39PM +0200, Andy Shevchenko wrote: > Agree. Would this be a more clean flow in the attached patch? LGTM. > From 3b863a7db00cefffc15df918a5132c35ea313c27 Mon Sep 17 00:00:00 2001 > From: Jarkko Sakkinen > Date: Mon, 5 Nov 2018 16:06:06 +0200 > Subject: [PATCH] x86/cpu/intel: clean up detect_sgx() flow > > Signed-off-by: Jarkko Sakkinen > --- > arch/x86/kernel/cpu/intel.c | 32 ++++++++++++++++++++------------ > 1 file changed, 20 insertions(+), 12 deletions(-) > > diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c > index bc52c52f7025..8a20a193d399 100644 > --- a/arch/x86/kernel/cpu/intel.c > +++ b/arch/x86/kernel/cpu/intel.c > @@ -598,28 +598,36 @@ static void detect_tme(struct cpuinfo_x86 *c) > > static void detect_sgx(struct cpuinfo_x86 *c) > { > - bool unsupported = false; > unsigned long long fc; > > rdmsrl(MSR_IA32_FEATURE_CONTROL, fc); > if (!(fc & FEATURE_CONTROL_LOCKED)) { > pr_err_once("sgx: IA32_FEATURE_CONTROL MSR is not locked\n"); > - unsupported = true; > - } else if (!(fc & FEATURE_CONTROL_SGX_ENABLE)) { > + goto out_unsupported; > + } > + > + if (!(fc & FEATURE_CONTROL_SGX_ENABLE)) { > pr_err_once("sgx: not enabled in IA32_FEATURE_CONTROL MSR\n"); > - unsupported = true; > - } else if (!cpu_has(c, X86_FEATURE_SGX1)) { > + goto out_unsupported; > + } > + > + if (!cpu_has(c, X86_FEATURE_SGX1)) { > pr_err_once("sgx: SGX1 instruction set not supported\n"); > - unsupported = true; > + goto out_unsupported; > } > > - if (unsupported) { > - setup_clear_cpu_cap(X86_FEATURE_SGX); > - setup_clear_cpu_cap(X86_FEATURE_SGX1); > - setup_clear_cpu_cap(X86_FEATURE_SGX2); > + if (!(fc & FEATURE_CONTROL_SGX_LE_WR)) { > + pr_info_once("sgx: launch control MSRs are not writable\n"); > + goto out_msrs_rdonly; > } > - if (unsupported || !(fc & FEATURE_CONTROL_SGX_LE_WR)) > - setup_clear_cpu_cap(X86_FEATURE_SGX_LC); > + > + return; > +out_unsupported: > + setup_clear_cpu_cap(X86_FEATURE_SGX); > + setup_clear_cpu_cap(X86_FEATURE_SGX1); > + setup_clear_cpu_cap(X86_FEATURE_SGX2); > +out_msrs_rdonly: > + setup_clear_cpu_cap(X86_FEATURE_SGX_LC); > } > > static void init_intel_energy_perf(struct cpuinfo_x86 *c) > -- > 2.19.1 > -- With Best Regards, Andy Shevchenko