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  • * Re: [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions
           [not found] ` <20181206221922.31012-5-sean.j.christopherson@intel.com>
           [not found]   ` <CALCETrXRJ645=08fyeoMQ949fLB1TvhsgERFVx5mAHdViEjq8Q@mail.gmail.com>
    @ 2018-12-07 18:15   ` Jethro Beekman
      2018-12-07 18:44     ` Dave Hansen
           [not found]   ` <20181207163127.GA23494@wind.enjellic.com>
      2 siblings, 1 reply; 19+ messages in thread
    From: Jethro Beekman @ 2018-12-07 18:15 UTC (permalink / raw)
      To: Sean Christopherson, Andy Lutomirski, Thomas Gleixner,
    	Ingo Molnar, Borislav Petkov, x86, Dave Hansen, Peter Zijlstra
      Cc: H. Peter Anvin, linux-kernel, Andy Lutomirski, Jarkko Sakkinen,
    	Josh Triplett, Haitao Huang, linux-sgx, Dr. Greg
    
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    On 2018-12-07 03:49, Sean Christopherson wrote:
    
    ...
    
    > diff --git a/arch/x86/entry/vdso/vsgx_enter_enclave.c b/arch/x86/entry/vdso/vsgx_enter_enclave.c
    > new file mode 100644
    > index 000000000000..896c2eb079bb
    > --- /dev/null
    > +++ b/arch/x86/entry/vdso/vsgx_enter_enclave.c
    
    ...
    
    > +enter_enclave:
    > +	asm volatile(
    > +		/*
    > +		 * When an event occurs in an enclave, hardware first exits the
    > +		 * enclave to the AEP, switching CPU context along the way, and
    > +		 * *then* delivers the event as usual.  As part of the context
    > +		 * switching, registers are loaded with synthetic state (except
    > +		 * BP and SP, which are saved/restored).  The defined synthetic
    > +		 * state loads registers so that simply executing ENCLU will do
    > +		 * ERESUME, e.g. RAX=4, RBX=TCS and RCX=AEP after an AEE.  So,
    > +		 * we only need to load RAX, RBX and RCX for the initial entry.
    > +		 * The AEP can point at that same ENCLU, fixup will jump us out
    > +		 * if an exception was unhandled.
    > +		 */
    > +		"	lea	1f(%%rip), %%rcx\n"
    > +		"1:	enclu\n"
    > +		"2:\n"
    > +
    > +		".pushsection .fixup, \"ax\" \n"
    > +		"3:	jmp 2b\n"
    > +		".popsection\n"
    > +		_ASM_VDSO_EXTABLE_HANDLE(1b, 3b)
    > +
    > +		: "=a"(leaf), "=D" (rdi), "=S" (rsi), "=d" (rdx)
    > +		: "a" (leaf), "b" (tcs), "D" (priv)
    > +		: "cc", "memory",
    > +		  "rcx", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
    > +	);
    
    This is not sufficient to support the Fortanix SGX ABI calling 
    convention, which was designed to be mostly compatible with the SysV 
    64-bit calling convention. The following registers need to be passed in 
    to an enclave from userspace: RDI, RSI, RDX, R8, R9, R10. The following 
    registers need to be passed out from an enclave to userspace: RDI, RSI, 
    RDX, R8, R9.
    
    You can find the ABI specification at 
    https://github.com/fortanix/rust-sgx/blob/master/doc/FORTANIX-SGX-ABI.md#enclave-calling-convention
    
    --
    Jethro Beekman | Fortanix
    
    
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    ^ permalink raw reply	[flat|nested] 19+ messages in thread
  • [parent not found: <20181207163127.GA23494@wind.enjellic.com>]

  • end of thread, other threads:[~2018-12-14 15:04 UTC | newest]
    
    Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
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         [not found] <20181206221922.31012-1-sean.j.christopherson@intel.com>
         [not found] ` <20181206221922.31012-5-sean.j.christopherson@intel.com>
         [not found]   ` <CALCETrXRJ645=08fyeoMQ949fLB1TvhsgERFVx5mAHdViEjq8Q@mail.gmail.com>
    2018-12-07 16:51     ` [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions Sean Christopherson
    2018-12-07 17:56       ` Andy Lutomirski
    2018-12-07 19:02         ` Sean Christopherson
    2018-12-07 19:23           ` Andy Lutomirski
    2018-12-07 20:09             ` Sean Christopherson
    2018-12-07 20:16               ` Andy Lutomirski
    2018-12-07 20:35                 ` Sean Christopherson
    2018-12-07 21:26                 ` Sean Christopherson
    2018-12-07 23:33                   ` Andy Lutomirski
    2018-12-11 19:31                     ` Sean Christopherson
    2018-12-11 20:04                       ` Andy Lutomirski
    2018-12-11 22:00                         ` Sean Christopherson
    2018-12-11 23:12                           ` Andy Lutomirski
    2018-12-07 18:15   ` Jethro Beekman
    2018-12-07 18:44     ` Dave Hansen
    2018-12-07 18:50       ` Andy Lutomirski
    2018-12-08  8:15       ` Jethro Beekman
    2018-12-14 15:04         ` Sean Christopherson
         [not found]   ` <20181207163127.GA23494@wind.enjellic.com>
    2018-12-07 18:19     ` Jethro Beekman
    

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