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From: Kai Huang <kai.huang@intel.com>
To: linux-sgx@vger.kernel.org, kvm@vger.kernel.org, x86@kernel.org
Cc: seanjc@google.com, jarkko@kernel.org, luto@kernel.org,
	dave.hansen@intel.com, haitao.huang@intel.com,
	pbonzini@redhat.com, bp@alien8.de, tglx@linutronix.de,
	mingo@redhat.com, hpa@zytor.com, jmattson@google.com,
	joro@8bytes.org, vkuznets@redhat.com, wanpengli@tencent.com,
	Kai Huang <kai.huang@intel.com>
Subject: [RFC PATCH v2 23/26] KVM: VMX: Add emulation of SGX Launch Control LE hash MSRs
Date: Mon, 18 Jan 2021 16:28:34 +1300	[thread overview]
Message-ID: <5a8dbad4c5a7ba7b17ac4bf4239a50be7acc1805.1610935432.git.kai.huang@intel.com> (raw)
In-Reply-To: <cover.1610935432.git.kai.huang@intel.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

Emulate the four Launch Enclave public key hash MSRs (LE hash MSRs) that
exist on CPUs that support SGX Launch Control (LC).  SGX LC modifies the
behavior of ENCLS[EINIT] to use the LE hash MSRs when verifying the key
used to sign an enclave.  On CPUs without LC support, the LE hash is
hardwired into the CPU to an Intel controlled key (the Intel key is also
the reset value of the LE hash MSRs). Track the guest's desired hash so
that a future patch can stuff the hash into the hardware MSRs when
executing EINIT on behalf of the guest, when those MSRs are writable in
host.

Note, KVM allows writes to the LE hash MSRs if IA32_FEATURE_CONTROL is
unlocked.  This is technically not architectural behavior, but it's
roughly equivalent to the arch behavior of the MSRs being writable prior
to activating SGX[1].  Emulating SGX activation is feasible, but adds no
tangible benefits and would just create extra work for KVM and guest
firmware.

[1] SGX related bits in IA32_FEATURE_CONTROL cannot be set until SGX
    is activated, e.g. by firmware.  SGX activation is triggered by
    setting bit 0 in MSR 0x7a.  Until SGX is activated, the LE hash
    MSRs are writable, e.g. to allow firmware to lock down the LE
    root key with a non-Intel value.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Co-developed-by: Kai Huang <kai.huang@intel.com>
Signed-off-by: Kai Huang <kai.huang@intel.com>
---
 arch/x86/kvm/vmx/sgx.c | 35 +++++++++++++++++++++++++++++++++++
 arch/x86/kvm/vmx/sgx.h |  6 ++++++
 arch/x86/kvm/vmx/vmx.c | 20 ++++++++++++++++++++
 arch/x86/kvm/vmx/vmx.h |  2 ++
 4 files changed, 63 insertions(+)

diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c
index 4281045318ac..6ad6a24c4e93 100644
--- a/arch/x86/kvm/vmx/sgx.c
+++ b/arch/x86/kvm/vmx/sgx.c
@@ -12,6 +12,9 @@
 
 bool __read_mostly enable_sgx;
 
+/* Initial value of guest's virtual SGX_LEPUBKEYHASHn MSRs */
+static u64 sgx_pubkey_hash[4] __ro_after_init;
+
 /*
  * ENCLS's memory operands use a fixed segment (DS) and a fixed
  * address size based on the mode.  Related prefixes are ignored.
@@ -292,3 +295,35 @@ int handle_encls(struct kvm_vcpu *vcpu)
 	}
 	return 1;
 }
+
+void setup_default_sgx_lepubkeyhash(void)
+{
+	/*
+	 * Use Intel's default value for Skylake hardware if Launch Control is
+	 * not supported, i.e. Intel's hash is hardcoded into silicon, or if
+	 * Launch Control is supported and enabled, i.e. mimic the reset value
+	 * and let the guest write the MSRs at will.  If Launch Control is
+	 * supported but disabled, then use the current MSR values as the hash
+	 * MSRs exist but are read-only (locked and not writable).
+	 */
+	if (!enable_sgx || !boot_cpu_has(X86_FEATURE_SGX_LC) ||
+	    rdmsrl_safe(MSR_IA32_SGXLEPUBKEYHASH0, &sgx_pubkey_hash[0])) {
+		sgx_pubkey_hash[0] = 0xa6053e051270b7acULL;
+		sgx_pubkey_hash[1] = 0x6cfbe8ba8b3b413dULL;
+		sgx_pubkey_hash[2] = 0xc4916d99f2b3735dULL;
+		sgx_pubkey_hash[3] = 0xd4f8c05909f9bb3bULL;
+	} else {
+		/* MSR_IA32_SGXLEPUBKEYHASH0 is read above */
+		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);
+		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);
+		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);
+	}
+}
+
+void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu)
+{
+	struct vcpu_vmx *vmx = to_vmx(vcpu);
+
+	memcpy(vmx->msr_ia32_sgxlepubkeyhash, sgx_pubkey_hash,
+	       sizeof(sgx_pubkey_hash));
+}
diff --git a/arch/x86/kvm/vmx/sgx.h b/arch/x86/kvm/vmx/sgx.h
index 647afc7546bf..05d774f62b7f 100644
--- a/arch/x86/kvm/vmx/sgx.h
+++ b/arch/x86/kvm/vmx/sgx.h
@@ -8,8 +8,14 @@
 extern bool __read_mostly enable_sgx;
 
 int handle_encls(struct kvm_vcpu *vcpu);
+
+void setup_default_sgx_lepubkeyhash(void);
+void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu);
 #else
 #define enable_sgx 0
+
+static inline void setup_default_sgx_lepubkeyhash(void) { }
+static inline void vcpu_setup_sgx_lepubkeyhash(struct kvm_vcpu *vcpu) { }
 #endif
 
 #endif /* __KVM_X86_SGX_H */
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 149f472ac9df..a3372f6c557d 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1888,6 +1888,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 	case MSR_IA32_FEAT_CTL:
 		msr_info->data = vmx->msr_ia32_feature_control;
 		break;
+	case MSR_IA32_SGXLEPUBKEYHASH0 ... MSR_IA32_SGXLEPUBKEYHASH3:
+		if (!msr_info->host_initiated &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SGX_LC))
+			return 1;
+		msr_info->data = to_vmx(vcpu)->msr_ia32_sgxlepubkeyhash
+			[msr_info->index - MSR_IA32_SGXLEPUBKEYHASH0];
+		break;
 	case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:
 		if (!nested_vmx_allowed(vcpu))
 			return 1;
@@ -2154,6 +2161,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		if (msr_info->host_initiated && data == 0)
 			vmx_leave_nested(vcpu);
 		break;
+	case MSR_IA32_SGXLEPUBKEYHASH0 ... MSR_IA32_SGXLEPUBKEYHASH3:
+		if (!msr_info->host_initiated &&
+		    (!guest_cpuid_has(vcpu, X86_FEATURE_SGX_LC) ||
+		    ((vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED) &&
+		    !(vmx->msr_ia32_feature_control & FEAT_CTL_SGX_LC_ENABLED))))
+			return 1;
+		vmx->msr_ia32_sgxlepubkeyhash
+			[msr_index - MSR_IA32_SGXLEPUBKEYHASH0] = data;
+		break;
 	case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:
 		if (!msr_info->host_initiated)
 			return 1; /* they are read-only */
@@ -6957,6 +6973,8 @@ static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
 	else
 		memset(&vmx->nested.msrs, 0, sizeof(vmx->nested.msrs));
 
+	vcpu_setup_sgx_lepubkeyhash(vcpu);
+
 	vmx->nested.posted_intr_nv = -1;
 	vmx->nested.current_vmptr = -1ull;
 
@@ -7907,6 +7925,8 @@ static __init int hardware_setup(void)
 	if (!enable_ept || !cpu_has_vmx_intel_pt())
 		pt_mode = PT_MODE_SYSTEM;
 
+	setup_default_sgx_lepubkeyhash();
+
 	if (nested) {
 		nested_vmx_setup_ctls_msrs(&vmcs_config.nested,
 					   vmx_capability.ept);
diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index 903f246b5abd..af4bced6c84b 100644
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -299,6 +299,8 @@ struct vcpu_vmx {
 	 */
 	u64 msr_ia32_feature_control;
 	u64 msr_ia32_feature_control_valid_bits;
+	/* SGX Launch Control public key hash */
+	u64 msr_ia32_sgxlepubkeyhash[4];
 	u64 ept_pointer;
 
 	struct pt_desc pt_desc;
-- 
2.29.2


  parent reply	other threads:[~2021-01-18  3:31 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-18  3:26 [RFC PATCH v2 00/26] KVM SGX virtualization support Kai Huang
2021-01-18  3:26 ` [RFC PATCH v2 01/26] x86/cpufeatures: Add SGX1 and SGX2 sub-features Kai Huang
2021-01-19 16:19   ` Borislav Petkov
2021-01-19 18:03     ` Sean Christopherson
2021-01-19 22:54       ` Kai Huang
2021-01-20 10:28       ` Borislav Petkov
2021-01-20 11:50   ` Jarkko Sakkinen
2021-01-20 23:23     ` Kai Huang
2021-01-21  1:01       ` Jarkko Sakkinen
2021-01-18  3:26 ` [RFC PATCH v2 02/26] x86/sgx: Remove a warn from sgx_free_epc_page() Kai Huang
2021-01-19  8:32   ` Jarkko Sakkinen
2021-01-20  0:42     ` Kai Huang
2021-01-18  3:26 ` [RFC PATCH v2 03/26] x86/sgx: Wipe out EREMOVE " Kai Huang
2021-01-18  3:26 ` [RFC PATCH v2 04/26] x86/sgx: Add SGX_CHILD_PRESENT hardware error code Kai Huang
2021-01-20 11:51   ` Jarkko Sakkinen
2021-01-18  3:26 ` [RFC PATCH v2 05/26] x86/sgx: Introduce virtual EPC for use by KVM guests Kai Huang
2021-01-20 11:54   ` Jarkko Sakkinen
2021-01-20 17:40     ` Sean Christopherson
2021-01-21  0:54       ` Jarkko Sakkinen
2021-01-21  0:55         ` Jarkko Sakkinen
2021-01-18  3:27 ` [RFC PATCH v2 06/26] x86/cpu/intel: Allow SGX virtualization without Launch Control support Kai Huang
2021-01-20 21:02   ` Dave Hansen
2021-01-20 22:36     ` Sean Christopherson
2021-01-20 23:27       ` Dave Hansen
2021-01-20 23:48         ` Kai Huang
2021-01-20 23:51           ` Dave Hansen
2021-01-21  1:53             ` Kai Huang
2021-01-21 14:35               ` Jarkko Sakkinen
2021-01-21  1:12         ` Jarkko Sakkinen
2021-01-20 23:50     ` Kai Huang
2021-01-21  1:11     ` Jarkko Sakkinen
2021-01-18  3:27 ` [RFC PATCH v2 07/26] x86/sgx: Initialize virtual EPC driver even when SGX driver is disabled Kai Huang
2021-01-18  3:27 ` [RFC PATCH v2 08/26] x86/sgx: Expose SGX architectural definitions to the kernel Kai Huang
2021-01-20 11:58   ` Jarkko Sakkinen
2021-01-20 23:53     ` Kai Huang
2021-01-18  3:27 ` [RFC PATCH v2 09/26] x86/sgx: Move ENCLS leaf definitions to sgx_arch.h Kai Huang
2021-01-20 11:59   ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 10/26] x86/sgx: Add SGX2 ENCLS leaf definitions (EAUG, EMODPR and EMODT) Kai Huang
2021-01-20 11:59   ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 11/26] x86/sgx: Add encls_faulted() helper Kai Huang
2021-01-20 12:03   ` Jarkko Sakkinen
2021-01-20 23:43     ` Kai Huang
2021-01-21  1:08       ` Jarkko Sakkinen
2021-01-21  1:12         ` Kai Huang
2021-01-21 14:38           ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 12/26] x86/sgx: Add helper to update SGX_LEPUBKEYHASHn MSRs Kai Huang
2021-01-20 12:03   ` Jarkko Sakkinen
2021-01-20 18:36     ` Dave Hansen
2021-01-20 23:36       ` Kai Huang
2021-01-20 23:50         ` Dave Hansen
2021-01-21  1:06           ` Kai Huang
2021-01-21  1:15             ` Dave Hansen
2021-01-21  1:44               ` Kai Huang
2021-01-21 14:36                 ` Jarkko Sakkinen
2021-01-21  1:18             ` Kai Huang
2021-01-21  1:09         ` Jarkko Sakkinen
2021-01-21  1:08       ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 13/26] x86/sgx: Add helpers to expose ECREATE and EINIT to KVM Kai Huang
2021-01-20 12:04   ` Jarkko Sakkinen
2021-01-20 23:29     ` Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 14/26] x86/sgx: Move provisioning device creation out of SGX driver Kai Huang
2021-01-20 14:09   ` Jarkko Sakkinen
2021-01-20 23:24     ` Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 15/26] KVM: VMX: Convert vcpu_vmx.exit_reason to a union Kai Huang
2021-01-20 14:18   ` Jarkko Sakkinen
2021-01-20 16:39     ` Sean Christopherson
2021-01-21  0:47       ` Jarkko Sakkinen
2021-01-21 16:33         ` Sean Christopherson
2021-01-22 17:29           ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 16/26] KVM: x86: Export kvm_mmu_gva_to_gpa_{read,write}() for SGX (VMX) Kai Huang
2021-01-20 14:19   ` Jarkko Sakkinen
2021-01-18  3:28 ` [RFC PATCH v2 17/26] KVM: x86: Define new #PF SGX error code bit Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 18/26] KVM: x86: Add support for reverse CPUID lookup of scattered features Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 19/26] KVM: x86: Add reverse-CPUID lookup support for scattered SGX features Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 20/26] KVM: VMX: Add basic handling of VM-Exit from SGX enclave Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 21/26] KVM: VMX: Frame in ENCLS handler for SGX virtualization Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 22/26] KVM: VMX: Add SGX ENCLS[ECREATE] handler to enforce CPUID restrictions Kai Huang
2021-01-18  3:28 ` Kai Huang [this message]
2021-01-18  3:28 ` [RFC PATCH v2 24/26] KVM: VMX: Add ENCLS[EINIT] handler to support SGX Launch Control (LC) Kai Huang
2021-01-18  3:28 ` [RFC PATCH v2 25/26] KVM: VMX: Enable SGX virtualization for SGX1, SGX2 and LC Kai Huang
2021-01-18  3:29 ` [RFC PATCH v2 26/26] KVM: x86: Add capability to grant VM access to privileged SGX attribute Kai Huang
2021-01-19  8:23 ` [RFC PATCH v2 00/26] KVM SGX virtualization support Jarkko Sakkinen
2021-01-20  0:52   ` Kai Huang
2021-01-20 16:35     ` Sean Christopherson
2021-01-20 16:39       ` Paolo Bonzini
2021-01-21  1:28         ` Kai Huang
2021-01-20 23:43     ` Jarkko Sakkinen
2021-01-20 23:52       ` Kai Huang
2021-01-21  1:16         ` Jarkko Sakkinen
2021-01-21  1:27           ` Kai Huang
2021-01-21 14:34             ` Jarkko Sakkinen

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