From: Jethro Beekman <jethro@fortanix.com>
To: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
x86@kernel.org, linux-sgx@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
Sean Christopherson <sean.j.christopherson@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Cedric Xing <cedric.xing@intel.com>,
akpm@linux-foundation.org, andriy.shevchenko@linux.intel.com,
asapek@google.com, bp@alien8.de, chenalexchen@google.com,
conradparker@google.com, cyhanish@google.com,
dave.hansen@intel.com, haitao.huang@intel.com,
josh@joshtriplett.org, kai.huang@intel.com, kai.svahn@intel.com,
kmoy@google.com, ludloff@google.com, luto@kernel.org,
nhorman@redhat.com, npmccallum@redhat.com, puiterwijk@redhat.com,
rientjes@google.com, tglx@linutronix.de, yaozhangx@google.com
Subject: Re: [PATCH v35 21/24] x86/vdso: Implement a vDSO for Intel SGX enclave call
Date: Tue, 14 Jul 2020 09:30:03 +0200 [thread overview]
Message-ID: <dcebec2e-ea46-48ec-e49b-292b10282373@fortanix.com> (raw)
In-Reply-To: <20200707033747.142828-22-jarkko.sakkinen@linux.intel.com>
[-- Attachment #1: Type: text/plain, Size: 4768 bytes --]
On 2020-07-07 05:37, Jarkko Sakkinen wrote:
> From: Sean Christopherson <sean.j.christopherson@intel.com>
>
> An SGX runtime must be aware of the exceptions, which happen inside an
> enclave. Introduce a vDSO call that wraps EENTER/ERESUME cycle and returns
> the CPU exception back to the caller exactly when it happens.
>
> Kernel fixups the exception information to RDI, RSI and RDX. The SGX call
> vDSO handler fills this information to the user provided buffer or
> alternatively trigger user provided callback at the time of the exception.
>
> The calling convention is custom and does not follow System V x86-64 ABI.
>
> Suggested-by: Andy Lutomirski <luto@amacapital.net>
> Acked-by: Jethro Beekman <jethro@fortanix.com>
> Tested-by: Jethro Beekman <jethro@fortanix.com>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Co-developed-by: Cedric Xing <cedric.xing@intel.com>
> Signed-off-by: Cedric Xing <cedric.xing@intel.com>
> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> ---
> arch/x86/entry/vdso/Makefile | 2 +
> arch/x86/entry/vdso/vdso.lds.S | 1 +
> arch/x86/entry/vdso/vsgx_enter_enclave.S | 131 +++++++++++++++++++++++
> arch/x86/include/asm/enclu.h | 8 ++
> arch/x86/include/uapi/asm/sgx.h | 98 +++++++++++++++++
> 5 files changed, 240 insertions(+)
> create mode 100644 arch/x86/entry/vdso/vsgx_enter_enclave.S
> create mode 100644 arch/x86/include/asm/enclu.h
>
> diff --git a/arch/x86/entry/vdso/Makefile b/arch/x86/entry/vdso/Makefile
> index ebe82b7aecda..f71ad5ebd0c4 100644
> --- a/arch/x86/entry/vdso/Makefile
> +++ b/arch/x86/entry/vdso/Makefile
> @@ -29,6 +29,7 @@ VDSO32-$(CONFIG_IA32_EMULATION) := y
> vobjs-y := vdso-note.o vclock_gettime.o vgetcpu.o
> vobjs32-y := vdso32/note.o vdso32/system_call.o vdso32/sigreturn.o
> vobjs32-y += vdso32/vclock_gettime.o
> +vobjs-$(VDSO64-y) += vsgx_enter_enclave.o
>
> # files to link into kernel
> obj-y += vma.o extable.o
> @@ -100,6 +101,7 @@ $(vobjs): KBUILD_CFLAGS := $(filter-out $(GCC_PLUGINS_CFLAGS) $(RETPOLINE_CFLAGS
> CFLAGS_REMOVE_vclock_gettime.o = -pg
> CFLAGS_REMOVE_vdso32/vclock_gettime.o = -pg
> CFLAGS_REMOVE_vgetcpu.o = -pg
> +CFLAGS_REMOVE_vsgx_enter_enclave.o = -pg
>
> #
> # X32 processes use x32 vDSO to access 64bit kernel data.
> diff --git a/arch/x86/entry/vdso/vdso.lds.S b/arch/x86/entry/vdso/vdso.lds.S
> index 36b644e16272..4bf48462fca7 100644
> --- a/arch/x86/entry/vdso/vdso.lds.S
> +++ b/arch/x86/entry/vdso/vdso.lds.S
> @@ -27,6 +27,7 @@ VERSION {
> __vdso_time;
> clock_getres;
> __vdso_clock_getres;
> + __vdso_sgx_enter_enclave;
> local: *;
> };
> }
> diff --git a/arch/x86/entry/vdso/vsgx_enter_enclave.S b/arch/x86/entry/vdso/vsgx_enter_enclave.S
> new file mode 100644
> index 000000000000..be7e467e1efb
> --- /dev/null
> +++ b/arch/x86/entry/vdso/vsgx_enter_enclave.S
> @@ -0,0 +1,131 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +
> +#include <linux/linkage.h>
> +#include <asm/export.h>
> +#include <asm/errno.h>
> +#include <asm/enclu.h>
> +
> +#include "extable.h"
> +
> +#define EX_LEAF 0*8
> +#define EX_TRAPNR 0*8+4
> +#define EX_ERROR_CODE 0*8+6
> +#define EX_ADDRESS 1*8
> +
> +.code64
> +.section .text, "ax"
> +
> +SYM_FUNC_START(__vdso_sgx_enter_enclave)
> + /* Prolog */
> + .cfi_startproc
> + push %rbp
> + .cfi_adjust_cfa_offset 8
> + .cfi_rel_offset %rbp, 0
> + mov %rsp, %rbp
> + .cfi_def_cfa_register %rbp
> + push %rbx
> + .cfi_rel_offset %rbx, -8
> +
> + mov %ecx, %eax
> +.Lenter_enclave:
> + /* EENTER <= leaf <= ERESUME */
> + cmp $EENTER, %eax
> + jb .Linvalid_leaf
> + cmp $ERESUME, %eax
> + ja .Linvalid_leaf
> +
> + /* Load TCS and AEP */
> + mov 0x10(%rbp), %rbx
> + lea .Lasync_exit_pointer(%rip), %rcx
> +
> + /* Single ENCLU serving as both EENTER and AEP (ERESUME) */
> +.Lasync_exit_pointer:
> +.Lenclu_eenter_eresume:
> + enclu
After thinking about this some more, I'd like to come back to this setup. Prior discussion at https://lkml.org/lkml/2018/11/2/597 . I hope I'm not derailing the discussion so much as to delay the patch set :(
I previously mentioned “Userspace may want fine-grained control over enclave scheduling” as a reason userspace may want to specify a different AEP, but gave a bad example. Here's a better example: If I'm running my enclave in an M:N threading model (where M user threads run N TCSs, with N > M), an AEX is a good oppurtunity to switch contexts. Yes, I could implement this with alarm() or so, but that adds overhead while missing out on a lot of opportunities for context switching.
--
Jethro Beekman | Fortanix
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4054 bytes --]
next prev parent reply other threads:[~2020-07-14 7:30 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-07 3:37 [PATCH v35 00/24] Intel SGX foundations Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 01/24] x86/cpufeatures: x86/msr: Add Intel SGX hardware bits Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 02/24] x86/cpufeatures: x86/msr: Add Intel SGX Launch Control " Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 03/24] x86/mm: x86/sgx: Signal SIGSEGV with PF_SGX Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 04/24] x86/sgx: Add SGX microarchitectural data structures Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 05/24] x86/sgx: Add wrappers for ENCLS leaf functions Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 06/24] x86/cpu/intel: Detect SGX support Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 07/24] x86/cpu/intel: Add nosgx kernel parameter Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 08/24] x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 09/24] x86/sgx: Add __sgx_alloc_epc_page() and sgx_free_epc_page() Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 10/24] mm: Add vm_ops->mprotect() Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 11/24] x86/sgx: Add SGX enclave driver Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 12/24] x86/sgx: Add SGX_IOC_ENCLAVE_CREATE Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 13/24] x86/sgx: Add SGX_IOC_ENCLAVE_ADD_PAGES Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 14/24] x86/sgx: Add SGX_IOC_ENCLAVE_INIT Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 15/24] x86/sgx: Allow a limited use of ATTRIBUTE.PROVISIONKEY for attestation Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 16/24] x86/sgx: Add a page reclaimer Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 17/24] x86/sgx: ptrace() support for the SGX driver Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 18/24] x86/vdso: Add support for exception fixup in vDSO functions Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 19/24] x86/fault: Add helper function to sanitize error code Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 20/24] x86/traps: Attempt to fixup exceptions in vDSO before signaling Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 21/24] x86/vdso: Implement a vDSO for Intel SGX enclave call Jarkko Sakkinen
2020-07-14 7:30 ` Jethro Beekman [this message]
2020-07-14 9:56 ` Jarkko Sakkinen
2020-07-14 10:07 ` Jethro Beekman
2020-07-14 11:38 ` Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 22/24] selftests/x86: Add a selftest for SGX Jarkko Sakkinen
2020-07-07 3:37 ` [PATCH v35 23/24] docs: x86/sgx: Document SGX micro architecture and kernel internals Jarkko Sakkinen
2020-07-07 4:06 ` Matthew Wilcox
2020-07-07 3:37 ` [PATCH v35 24/24] x86/sgx: Update MAINTAINERS Jarkko Sakkinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=dcebec2e-ea46-48ec-e49b-292b10282373@fortanix.com \
--to=jethro@fortanix.com \
--cc=akpm@linux-foundation.org \
--cc=andriy.shevchenko@linux.intel.com \
--cc=asapek@google.com \
--cc=bp@alien8.de \
--cc=cedric.xing@intel.com \
--cc=chenalexchen@google.com \
--cc=conradparker@google.com \
--cc=cyhanish@google.com \
--cc=dave.hansen@intel.com \
--cc=haitao.huang@intel.com \
--cc=jarkko.sakkinen@linux.intel.com \
--cc=josh@joshtriplett.org \
--cc=kai.huang@intel.com \
--cc=kai.svahn@intel.com \
--cc=kmoy@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sgx@vger.kernel.org \
--cc=ludloff@google.com \
--cc=luto@amacapital.net \
--cc=luto@kernel.org \
--cc=nhorman@redhat.com \
--cc=npmccallum@redhat.com \
--cc=puiterwijk@redhat.com \
--cc=rientjes@google.com \
--cc=sean.j.christopherson@intel.com \
--cc=tglx@linutronix.de \
--cc=x86@kernel.org \
--cc=yaozhangx@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).