From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE336C4332F for ; Fri, 24 Sep 2021 17:07:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B282460EE9 for ; Fri, 24 Sep 2021 17:07:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344720AbhIXRJC (ORCPT ); Fri, 24 Sep 2021 13:09:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344601AbhIXRIk (ORCPT ); Fri, 24 Sep 2021 13:08:40 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1472EC061768; Fri, 24 Sep 2021 10:07:04 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id y5so4461278pll.3; Fri, 24 Sep 2021 10:07:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cLaNe7Oyl1seZD/HRHq9xGsMnTdlxwayLK+zY+0ZWyA=; b=a6B1fa1EFrAyHMDyM2bRqowYA1m2gfbCYpCnZ/RTz6m1F/Z/dQlchqxnx+mBDb+dUb 1zBxVAMktpHRLTNreaAWvXJy2PVijGItNZakSO6PhHijTWtNuhDBF0j9KRSoTNmVdxyH EUwywnfXZgaSzj0u27/le5yrpqvniLeRzg1xhhDTjpWFns6sCijGrDkpOnYz2rH36xeh LhnmONjIKUF25mIhxriUVeFCVwZYBTMbrJGBWjjOJ2Umy0b8E/scVDHFbhD86HN9fs2X CN3PDE6UG6lqMgjFeAizrORVDempoxTSHGp+91ePHvUOyRZ++vTwYT4QZWvfi5ZAXnnQ mlLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cLaNe7Oyl1seZD/HRHq9xGsMnTdlxwayLK+zY+0ZWyA=; b=2UfZZXQ7Lssgw80p1mRkpAd19Bg5hVl7qteu4LrPKKphT0NHou3NWw47x0oo4zoYwq C+7Os7oqNAy0To0Plhavmc0PbhP+wqQSTBoJVyS+bR4MRq/x32iFqQkFN2Gp8pTP1MuM Lx4Nad+YcHuFG+tR0lylBLTDfDVSjTTeuyR7jN/bS0Q/9NdRboEsTMuWHj3PdD1iYHeO u1YgJaXN83ufp2F5Epi9yRhpg2Ip4mbDQ9BPo2cC1rDLpYco915U5BmrC3dU2/nhPks1 I4VD0v491/nNvUwkdyoxWQc+wToFZkozZc85vDhRwrdAkRKeHnPLOidhChTRzE9jQBka vnzg== X-Gm-Message-State: AOAM532gWi588YG+um2PV4g+UckD9vYGqaBknHwwbwtedIrBRured/03 2HSkJVVaZr3iDiVjJht1jJCAfXgFTIA= X-Google-Smtp-Source: ABdhPJz92OdAzfkcpV8HuUJAcB177uT4jGMbXurYka0CQhlrf4R+Y8WUWjfM0nLp+Yz1RCQQ228a5w== X-Received: by 2002:a17:903:187:b0:13d:fd13:8862 with SMTP id z7-20020a170903018700b0013dfd138862mr662576plg.85.1632503223371; Fri, 24 Sep 2021 10:07:03 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id k22sm9659312pfi.149.2021.09.24.10.07.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Sep 2021 10:07:03 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Russell King , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Catalin Marinas , Will Deacon , Yoshinori Sato , Rich Felker , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , Ard Biesheuvel , Mike Rapoport , Linus Walleij , Andrew Morton , Geert Uytterhoeven , Arnd Bergmann , Guenter Roeck , Kefeng Wang , Mark Rutland , Andrey Konovalov , Anshuman Khandual , Valentin Schneider , Ingo Molnar , Peter Zijlstra , linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), linux-sh@vger.kernel.org (open list:SUPERH), linux-mips@vger.kernel.org (open list:BROADCOM BMIPS MIPS ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH 06/11] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg Date: Fri, 24 Sep 2021 10:05:41 -0700 Message-Id: <20210924170546.805663-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924170546.805663-1-f.fainelli@gmail.com> References: <20210924170546.805663-1-f.fainelli@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org In order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg(). Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index cc7cdd26e23e..4c011c21bb1a 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_mask_disable_reg); /** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register @@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_unmask_enable_reg); /** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit -- 2.25.1