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* [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support
@ 2021-10-06 16:43 Rob Herring
  2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
                   ` (13 more replies)
  0 siblings, 14 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

The first 10 patches add a new function, of_get_cpu_hwid(), which parses
CPU DT node 'reg' property, and then use it to replace all the open
coded versions of parsing CPU node 'reg' properties.

The last 2 patches add support for populating the cacheinfo 'id' on DT
platforms. The minimum associated CPU hwid is used for the id. The id is
optional, but necessary for resctrl which is being adapted for Arm MPAM.

Tested on arm64. Compile tested on arm, x86 and powerpc.

Rob

Rob Herring (12):
  of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes
  ARM: Use of_get_cpu_hwid()
  ARM: broadcom: Use of_get_cpu_hwid()
  arm64: Use of_get_cpu_hwid()
  csky: Use of_get_cpu_hwid()
  openrisc: Use of_get_cpu_hwid()
  powerpc: Use of_get_cpu_hwid()
  riscv: Use of_get_cpu_hwid()
  sh: Use of_get_cpu_hwid()
  x86: dt: Use of_get_cpu_hwid()
  cacheinfo: Allow for >32-bit cache 'id'
  cacheinfo: Set cache 'id' based on DT data

 arch/arm/kernel/devtree.c       | 22 ++-------------------
 arch/arm/mach-bcm/bcm63xx_pmb.c |  6 +++---
 arch/arm64/kernel/smp.c         | 31 ++----------------------------
 arch/csky/kernel/smp.c          |  6 ++----
 arch/openrisc/kernel/smp.c      |  6 +-----
 arch/powerpc/kernel/smp.c       |  7 +------
 arch/riscv/kernel/cpu.c         |  3 ++-
 arch/sh/boards/of-generic.c     |  5 ++---
 arch/x86/kernel/devicetree.c    |  5 ++---
 drivers/base/cacheinfo.c        | 34 ++++++++++++++++++++++++++++++++-
 drivers/of/base.c               | 22 +++++++++++++++++++++
 include/linux/cacheinfo.h       |  2 +-
 include/linux/of.h              |  1 +
 13 files changed, 74 insertions(+), 76 deletions(-)

-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-18 13:26   ` Sudeep Holla
  2021-10-06 16:43 ` [PATCH 02/12] ARM: Use of_get_cpu_hwid() Rob Herring
                   ` (12 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

There are various open coded implementions parsing the CPU node 'reg'
property which contains the CPU's hardware ID. Introduce a new function,
of_get_cpu_hwid(), to read the hardware ID.

All the callers should be DT only code, so no need for an empty
function.

Cc: Frank Rowand <frowand.list@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/of/base.c  | 22 ++++++++++++++++++++++
 include/linux/of.h |  1 +
 2 files changed, 23 insertions(+)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index f720c0d246f2..e587ab44be22 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -286,6 +286,28 @@ const void *of_get_property(const struct device_node *np, const char *name,
 }
 EXPORT_SYMBOL(of_get_property);
 
+/**
+ * of_get_cpu_hwid - Get the hardware ID from a CPU device node
+ *
+ * @cpun: CPU number(logical index) for which device node is required
+ * @thread: The local thread number to get the hardware ID for.
+ *
+ * Return: The hardware ID for the CPU node or ~0ULL if not found.
+ */
+u64 of_get_cpu_hwid(struct device_node *cpun, unsigned int thread)
+{
+	const __be32 *cell;
+	int ac, len;
+
+	ac = of_n_addr_cells(cpun);
+	cell = of_get_property(cpun, "reg", &len);
+	if (!cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len))
+		return ~0ULL;
+
+	cell += ac * thread;
+	return of_read_number(cell, ac);
+}
+
 /*
  * arch_match_cpu_phys_id - Match the given logical CPU and physical id
  *
diff --git a/include/linux/of.h b/include/linux/of.h
index 6f1c41f109bb..807f8168dad9 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -353,6 +353,7 @@ extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
 extern struct device_node *of_get_next_cpu_node(struct device_node *prev);
 extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node,
 						 int index);
+extern u64 of_get_cpu_hwid(struct device_node *cpun, unsigned int thread);
 
 #define for_each_property_of_node(dn, pp) \
 	for (pp = dn->properties; pp != NULL; pp = pp->next)
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 02/12] ARM: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
  2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-06 16:43 ` [PATCH 03/12] ARM: broadcom: " Rob Herring
                   ` (11 subsequent siblings)
  13 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace the open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

This change drops an error message for missing 'reg' property, but that
should not be necessary as the DT tools will ensure 'reg' is present.

Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/arm/kernel/devtree.c | 22 ++--------------------
 1 file changed, 2 insertions(+), 20 deletions(-)

diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 28311dd0fee6..02839d8b6202 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -84,33 +84,15 @@ void __init arm_dt_init_cpu_maps(void)
 		return;
 
 	for_each_of_cpu_node(cpu) {
-		const __be32 *cell;
-		int prop_bytes;
-		u32 hwid;
+		u32 hwid = of_get_cpu_hwid(cpu, 0);
 
 		pr_debug(" * %pOF...\n", cpu);
-		/*
-		 * A device tree containing CPU nodes with missing "reg"
-		 * properties is considered invalid to build the
-		 * cpu_logical_map.
-		 */
-		cell = of_get_property(cpu, "reg", &prop_bytes);
-		if (!cell || prop_bytes < sizeof(*cell)) {
-			pr_debug(" * %pOF missing reg property\n", cpu);
-			of_node_put(cpu);
-			return;
-		}
 
 		/*
 		 * Bits n:24 must be set to 0 in the DT since the reg property
 		 * defines the MPIDR[23:0].
 		 */
-		do {
-			hwid = be32_to_cpu(*cell++);
-			prop_bytes -= sizeof(*cell);
-		} while (!hwid && prop_bytes > 0);
-
-		if (prop_bytes || (hwid & ~MPIDR_HWID_BITMASK)) {
+		if (hwid & ~MPIDR_HWID_BITMASK) {
 			of_node_put(cpu);
 			return;
 		}
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 03/12] ARM: broadcom: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
  2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
  2021-10-06 16:43 ` [PATCH 02/12] ARM: Use of_get_cpu_hwid() Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-07  2:24   ` Florian Fainelli
  2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
                   ` (10 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes 'reg' property with
of_get_cpu_hwid().

Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/arm/mach-bcm/bcm63xx_pmb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-bcm/bcm63xx_pmb.c b/arch/arm/mach-bcm/bcm63xx_pmb.c
index 0e5a05bac3ea..003f1472ab45 100644
--- a/arch/arm/mach-bcm/bcm63xx_pmb.c
+++ b/arch/arm/mach-bcm/bcm63xx_pmb.c
@@ -91,10 +91,10 @@ static int bcm63xx_pmb_get_resources(struct device_node *dn,
 	struct of_phandle_args args;
 	int ret;
 
-	ret = of_property_read_u32(dn, "reg", cpu);
-	if (ret) {
+	*cpu = of_get_cpu_hwid(dn, 0);
+	if (*cpu == ~0U) {
 		pr_err("CPU is missing a reg node\n");
-		return ret;
+		return -ENODEV;
 	}
 
 	ret = of_parse_phandle_with_args(dn, "resets", "#reset-cells",
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 04/12] arm64: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (2 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 03/12] ARM: broadcom: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-07  8:07   ` Will Deacon
  2021-10-18 13:27   ` Sudeep Holla
  2021-10-06 16:43 ` [PATCH 05/12] csky: " Rob Herring
                   ` (9 subsequent siblings)
  13 siblings, 2 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace the open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

This change drops an error message for missing 'reg' property, but that
should not be necessary as the DT tools will ensure 'reg' is present.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/arm64/kernel/smp.c | 31 ++-----------------------------
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 6f6ff072acbd..c5cebc406d24 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -466,33 +466,6 @@ void __init smp_prepare_boot_cpu(void)
 	kasan_init_hw_tags();
 }
 
-static u64 __init of_get_cpu_mpidr(struct device_node *dn)
-{
-	const __be32 *cell;
-	u64 hwid;
-
-	/*
-	 * A cpu node with missing "reg" property is
-	 * considered invalid to build a cpu_logical_map
-	 * entry.
-	 */
-	cell = of_get_property(dn, "reg", NULL);
-	if (!cell) {
-		pr_err("%pOF: missing reg property\n", dn);
-		return INVALID_HWID;
-	}
-
-	hwid = of_read_number(cell, of_n_addr_cells(dn));
-	/*
-	 * Non affinity bits must be set to 0 in the DT
-	 */
-	if (hwid & ~MPIDR_HWID_BITMASK) {
-		pr_err("%pOF: invalid reg property\n", dn);
-		return INVALID_HWID;
-	}
-	return hwid;
-}
-
 /*
  * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
  * entries and check for duplicates. If any is found just ignore the
@@ -656,9 +629,9 @@ static void __init of_parse_and_init_cpus(void)
 	struct device_node *dn;
 
 	for_each_of_cpu_node(dn) {
-		u64 hwid = of_get_cpu_mpidr(dn);
+		u64 hwid = of_get_cpu_hwid(dn, 0);
 
-		if (hwid == INVALID_HWID)
+		if (hwid & ~MPIDR_HWID_BITMASK)
 			goto next;
 
 		if (is_mpidr_duplicate(cpu_count, hwid)) {
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 05/12] csky: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (3 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-06 16:43 ` [PATCH 06/12] openrisc: " Rob Herring
                   ` (8 subsequent siblings)
  13 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes 'reg' property with
of_get_cpu_hwid().

Cc: Guo Ren <guoren@kernel.org>
Cc: linux-csky@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/csky/kernel/smp.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
index e2993539af8e..6bb38bc2f39b 100644
--- a/arch/csky/kernel/smp.c
+++ b/arch/csky/kernel/smp.c
@@ -180,15 +180,13 @@ void __init setup_smp_ipi(void)
 void __init setup_smp(void)
 {
 	struct device_node *node = NULL;
-	int cpu;
+	unsigned int cpu;
 
 	for_each_of_cpu_node(node) {
 		if (!of_device_is_available(node))
 			continue;
 
-		if (of_property_read_u32(node, "reg", &cpu))
-			continue;
-
+		cpu = of_get_cpu_hwid(node, 0);
 		if (cpu >= NR_CPUS)
 			continue;
 
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (4 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 05/12] csky: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-06 20:44   ` Stafford Horne
  2021-10-06 16:43 ` [PATCH 07/12] powerpc: " Rob Herring
                   ` (7 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

Cc: Jonas Bonn <jonas@southpole.se>
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Cc: Stafford Horne <shorne@gmail.com>
Cc: openrisc@lists.librecores.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/openrisc/kernel/smp.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
index 415e209732a3..7d5a4f303a5a 100644
--- a/arch/openrisc/kernel/smp.c
+++ b/arch/openrisc/kernel/smp.c
@@ -65,11 +65,7 @@ void __init smp_init_cpus(void)
 	u32 cpu_id;
 
 	for_each_of_cpu_node(cpu) {
-		if (of_property_read_u32(cpu, "reg", &cpu_id)) {
-			pr_warn("%s missing reg property", cpu->full_name);
-			continue;
-		}
-
+		cpu_id = of_get_cpu_hwid(cpu);
 		if (cpu_id < NR_CPUS)
 			set_cpu_possible(cpu_id, true);
 	}
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 07/12] powerpc: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (5 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 06/12] openrisc: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-08 11:01   ` Michael Ellerman
  2021-10-06 16:43 ` [PATCH 08/12] riscv: " Rob Herring
                   ` (6 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/powerpc/kernel/smp.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 9cc7d3dbf439..d96b0e361a73 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -1313,18 +1313,13 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 int cpu_to_core_id(int cpu)
 {
 	struct device_node *np;
-	const __be32 *reg;
 	int id = -1;
 
 	np = of_get_cpu_node(cpu, NULL);
 	if (!np)
 		goto out;
 
-	reg = of_get_property(np, "reg", NULL);
-	if (!reg)
-		goto out;
-
-	id = be32_to_cpup(reg);
+	id = of_get_cpu_hwid(np, 0);
 out:
 	of_node_put(np);
 	return id;
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 08/12] riscv: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (6 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 07/12] powerpc: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-06 16:43 ` [PATCH 09/12] sh: " Rob Herring
                   ` (5 subsequent siblings)
  13 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: linux-riscv@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/riscv/kernel/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 6d59e6906fdd..f13b2c9ea912 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -22,7 +22,8 @@ int riscv_of_processor_hartid(struct device_node *node)
 		return -ENODEV;
 	}
 
-	if (of_property_read_u32(node, "reg", &hart)) {
+	hart = of_get_cpu_hwid(node, 0);
+	if (hart == ~0U) {
 		pr_warn("Found CPU without hart ID\n");
 		return -ENODEV;
 	}
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 09/12] sh: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (7 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 08/12] riscv: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-27 14:26   ` Rich Felker
  2021-10-06 16:43 ` [PATCH 10/12] x86: dt: " Rob Herring
                   ` (4 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Rich Felker <dalias@libc.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/sh/boards/of-generic.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 921d76fc3358..f7f3e618e85b 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -62,9 +62,8 @@ static void sh_of_smp_probe(void)
 	init_cpu_possible(cpumask_of(0));
 
 	for_each_of_cpu_node(np) {
-		const __be32 *cell = of_get_property(np, "reg", NULL);
-		u64 id = -1;
-		if (cell) id = of_read_number(cell, of_n_addr_cells(np));
+		u64 id = of_get_cpu_hwid(np, 0);
+
 		if (id < NR_CPUS) {
 			if (!method)
 				of_property_read_string(np, "enable-method", &method);
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 10/12] x86: dt: Use of_get_cpu_hwid()
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (8 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 09/12] sh: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-06 16:43 ` [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
                   ` (3 subsequent siblings)
  13 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Replace open coded parsing of CPU nodes' 'reg' property with
of_get_cpu_hwid().

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: x86@kernel.org
Cc: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 arch/x86/kernel/devicetree.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c
index 6a4cb71c2498..3aa1e99df2a9 100644
--- a/arch/x86/kernel/devicetree.c
+++ b/arch/x86/kernel/devicetree.c
@@ -139,12 +139,11 @@ static void __init dtb_cpu_setup(void)
 {
 	struct device_node *dn;
 	u32 apic_id, version;
-	int ret;
 
 	version = GET_APIC_VERSION(apic_read(APIC_LVR));
 	for_each_of_cpu_node(dn) {
-		ret = of_property_read_u32(dn, "reg", &apic_id);
-		if (ret < 0) {
+		apic_id = of_get_cpu_hwid(dn, 0);
+		if (apic_id == ~0U) {
 			pr_warn("%pOF: missing local APIC ID\n", dn);
 			continue;
 		}
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id'
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (9 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 10/12] x86: dt: " Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-18 13:30   ` Sudeep Holla
  2021-10-06 16:43 ` [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Rob Herring
                   ` (2 subsequent siblings)
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

In preparation to set the cache 'id' based on the CPU h/w ids, allow for
64-bit bit 'id' value. The only case that needs this is arm64, so
unsigned long is sufficient.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/base/cacheinfo.c  | 8 +++++++-
 include/linux/cacheinfo.h | 2 +-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index dad296229161..66d10bdb863b 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -366,13 +366,19 @@ static ssize_t file_name##_show(struct device *dev,		\
 	return sysfs_emit(buf, "%u\n", this_leaf->object);	\
 }
 
-show_one(id, id);
 show_one(level, level);
 show_one(coherency_line_size, coherency_line_size);
 show_one(number_of_sets, number_of_sets);
 show_one(physical_line_partition, physical_line_partition);
 show_one(ways_of_associativity, ways_of_associativity);
 
+static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct cacheinfo *this_leaf = dev_get_drvdata(dev);
+
+	return sysfs_emit(buf, "%lu\n", this_leaf->id);
+}
+
 static ssize_t size_show(struct device *dev,
 			 struct device_attribute *attr, char *buf)
 {
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 2f909ed084c6..b2e7f3e40204 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -48,7 +48,7 @@ extern unsigned int coherency_max_size;
  * keeping, the remaining members form the core properties of the cache
  */
 struct cacheinfo {
-	unsigned int id;
+	unsigned long id;
 	enum cache_type type;
 	unsigned int level;
 	unsigned int coherency_line_size;
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (10 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
@ 2021-10-06 16:43 ` Rob Herring
  2021-10-18 13:31   ` Sudeep Holla
  2021-10-07  2:24 ` [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Florian Fainelli
  2021-10-20 18:47 ` Rob Herring
  13 siblings, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 16:43 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Use the minimum CPU h/w id of the CPUs associated with the cache for the
cache 'id'. This will provide a stable id value for a given system. As
we need to check all possible CPUs, we can't use the shared_cpu_map
which is just online CPUs. As there's not a cache to CPUs mapping in DT,
we have to walk all CPU nodes and then walk cache levels.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/base/cacheinfo.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 66d10bdb863b..44547fd96f72 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -136,6 +136,31 @@ static bool cache_node_is_unified(struct cacheinfo *this_leaf,
 	return of_property_read_bool(np, "cache-unified");
 }
 
+static void cache_of_set_id(struct cacheinfo *this_leaf, struct device_node *np)
+{
+	struct device_node *cpu;
+	unsigned long min_id = ~0UL;
+
+	for_each_of_cpu_node(cpu) {
+		struct device_node *cache_node = cpu;
+		u64 id = of_get_cpu_hwid(cache_node, 0);
+
+		while ((cache_node = of_find_next_cache_node(cache_node))) {
+			if ((cache_node == np) && (id < min_id)) {
+				min_id = id;
+				of_node_put(cache_node);
+				break;
+			}
+			of_node_put(cache_node);
+		}
+	}
+
+	if (min_id != ~0UL) {
+		this_leaf->id = min_id;
+		this_leaf->attributes |= CACHE_ID;
+	}
+}
+
 static void cache_of_set_props(struct cacheinfo *this_leaf,
 			       struct device_node *np)
 {
@@ -151,6 +176,7 @@ static void cache_of_set_props(struct cacheinfo *this_leaf,
 	cache_get_line_size(this_leaf, np);
 	cache_nr_sets(this_leaf, np);
 	cache_associativity(this_leaf);
+	cache_of_set_id(this_leaf, np);
 }
 
 static int cache_setup_of_node(unsigned int cpu)
-- 
2.30.2


^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 06/12] openrisc: " Rob Herring
@ 2021-10-06 20:44   ` Stafford Horne
  2021-10-06 21:08     ` Rob Herring
  2021-10-06 21:27     ` Segher Boessenkool
  0 siblings, 2 replies; 29+ messages in thread
From: Stafford Horne @ 2021-10-06 20:44 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Michael Ellerman, Paul Walmsley,
	Palmer Dabbelt, Albert Ou, Yoshinori Sato, Rich Felker, x86,
	Greg Kroah-Hartman, Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

On Wed, Oct 06, 2021 at 11:43:26AM -0500, Rob Herring wrote:
> Replace open coded parsing of CPU nodes' 'reg' property with
> of_get_cpu_hwid().
> 
> Cc: Jonas Bonn <jonas@southpole.se>
> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> Cc: Stafford Horne <shorne@gmail.com>
> Cc: openrisc@lists.librecores.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>  arch/openrisc/kernel/smp.c | 6 +-----
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
> index 415e209732a3..7d5a4f303a5a 100644
> --- a/arch/openrisc/kernel/smp.c
> +++ b/arch/openrisc/kernel/smp.c
> @@ -65,11 +65,7 @@ void __init smp_init_cpus(void)
>  	u32 cpu_id;
>  
>  	for_each_of_cpu_node(cpu) {
> -		if (of_property_read_u32(cpu, "reg", &cpu_id)) {
> -			pr_warn("%s missing reg property", cpu->full_name);
> -			continue;
> -		}
> -
> +		cpu_id = of_get_cpu_hwid(cpu);

You have defined of_get_cpu_hwid to return u64, will this create compiler
warnings when since we are storing a u64 into a u32?

It seems only if we make with W=3.

I thought we usually warned on this.  Oh well, for the openrisc bits.

Acked-by: Stafford Horne <shorne@gmail.com>

>  		if (cpu_id < NR_CPUS)
>  			set_cpu_possible(cpu_id, true);
>  	}
> -- 
> 2.30.2
> 

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 20:44   ` Stafford Horne
@ 2021-10-06 21:08     ` Rob Herring
  2021-10-06 21:25       ` Stafford Horne
  2021-10-06 21:27     ` Segher Boessenkool
  1 sibling, 1 reply; 29+ messages in thread
From: Rob Herring @ 2021-10-06 21:08 UTC (permalink / raw)
  To: Stafford Horne
  Cc: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Michael Ellerman, Paul Walmsley,
	Palmer Dabbelt, Albert Ou, Yoshinori Sato, Rich Felker, X86 ML,
	Greg Kroah-Hartman, Florian Fainelli, Ray Jui, Scott Branden,
	maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	Openrisc, linuxppc-dev, linux-riscv, SH-Linux, devicetree

On Wed, Oct 6, 2021 at 3:44 PM Stafford Horne <shorne@gmail.com> wrote:
>
> On Wed, Oct 06, 2021 at 11:43:26AM -0500, Rob Herring wrote:
> > Replace open coded parsing of CPU nodes' 'reg' property with
> > of_get_cpu_hwid().
> >
> > Cc: Jonas Bonn <jonas@southpole.se>
> > Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> > Cc: Stafford Horne <shorne@gmail.com>
> > Cc: openrisc@lists.librecores.org
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > ---
> >  arch/openrisc/kernel/smp.c | 6 +-----
> >  1 file changed, 1 insertion(+), 5 deletions(-)
> >
> > diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
> > index 415e209732a3..7d5a4f303a5a 100644
> > --- a/arch/openrisc/kernel/smp.c
> > +++ b/arch/openrisc/kernel/smp.c
> > @@ -65,11 +65,7 @@ void __init smp_init_cpus(void)
> >       u32 cpu_id;
> >
> >       for_each_of_cpu_node(cpu) {
> > -             if (of_property_read_u32(cpu, "reg", &cpu_id)) {
> > -                     pr_warn("%s missing reg property", cpu->full_name);
> > -                     continue;
> > -             }
> > -
> > +             cpu_id = of_get_cpu_hwid(cpu);

Oops, that should be: of_get_cpu_hwid(cpu, 0);

I thought I double checked all those...

> You have defined of_get_cpu_hwid to return u64, will this create compiler
> warnings when since we are storing a u64 into a u32?

I'm counting on the caller to know the max size for their platform.

>
> It seems only if we make with W=3.
>
> I thought we usually warned on this.  Oh well, for the openrisc bits.

That's only on ptr truncation I think.

> Acked-by: Stafford Horne <shorne@gmail.com>
>
> >               if (cpu_id < NR_CPUS)
> >                       set_cpu_possible(cpu_id, true);
> >       }
> > --
> > 2.30.2
> >

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 21:08     ` Rob Herring
@ 2021-10-06 21:25       ` Stafford Horne
  0 siblings, 0 replies; 29+ messages in thread
From: Stafford Horne @ 2021-10-06 21:25 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Michael Ellerman, Paul Walmsley,
	Palmer Dabbelt, Albert Ou, Yoshinori Sato, Rich Felker, X86 ML,
	Greg Kroah-Hartman, Florian Fainelli, Ray Jui, Scott Branden,
	maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	Openrisc, linuxppc-dev, linux-riscv, SH-Linux, devicetree

On Wed, Oct 06, 2021 at 04:08:38PM -0500, Rob Herring wrote:
> On Wed, Oct 6, 2021 at 3:44 PM Stafford Horne <shorne@gmail.com> wrote:
> >
> > On Wed, Oct 06, 2021 at 11:43:26AM -0500, Rob Herring wrote:
> > > Replace open coded parsing of CPU nodes' 'reg' property with
> > > of_get_cpu_hwid().
> > >
> > > Cc: Jonas Bonn <jonas@southpole.se>
> > > Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> > > Cc: Stafford Horne <shorne@gmail.com>
> > > Cc: openrisc@lists.librecores.org
> > > Signed-off-by: Rob Herring <robh@kernel.org>
> > > ---
> > >  arch/openrisc/kernel/smp.c | 6 +-----
> > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > >
> > > diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c
> > > index 415e209732a3..7d5a4f303a5a 100644
> > > --- a/arch/openrisc/kernel/smp.c
> > > +++ b/arch/openrisc/kernel/smp.c
> > > @@ -65,11 +65,7 @@ void __init smp_init_cpus(void)
> > >       u32 cpu_id;
> > >
> > >       for_each_of_cpu_node(cpu) {
> > > -             if (of_property_read_u32(cpu, "reg", &cpu_id)) {
> > > -                     pr_warn("%s missing reg property", cpu->full_name);
> > > -                     continue;
> > > -             }
> > > -
> > > +             cpu_id = of_get_cpu_hwid(cpu);
> 
> Oops, that should be: of_get_cpu_hwid(cpu, 0);

OK. I checked all other patches in the series, it seems OpenRISC was the only
one missing that.  Sorry I missed it initially.

> I thought I double checked all those...
> 
> > You have defined of_get_cpu_hwid to return u64, will this create compiler
> > warnings when since we are storing a u64 into a u32?
> 
> I'm counting on the caller to know the max size for their platform.

OK.

> >
> > It seems only if we make with W=3.
> >
> > I thought we usually warned on this.  Oh well, for the openrisc bits.
> 
> That's only on ptr truncation I think.

Right, that makes sense.

-Stafford

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 20:44   ` Stafford Horne
  2021-10-06 21:08     ` Rob Herring
@ 2021-10-06 21:27     ` Segher Boessenkool
  2021-10-06 22:37       ` Stafford Horne
  2021-10-07  7:53       ` David Laight
  1 sibling, 2 replies; 29+ messages in thread
From: Segher Boessenkool @ 2021-10-06 21:27 UTC (permalink / raw)
  To: Stafford Horne
  Cc: Rob Herring, Rich Felker, Rafael J. Wysocki, linux-kernel,
	Guo Ren, H. Peter Anvin, linux-riscv, Will Deacon, Jonas Bonn,
	Florian Fainelli, Yoshinori Sato, linux-sh, x86, Russell King,
	linux-csky, Ingo Molnar, bcm-kernel-feedback-list,
	Catalin Marinas, Palmer Dabbelt, devicetree, Albert Ou, Ray Jui,
	Stefan Kristiansson, openrisc, Borislav Petkov, Paul Walmsley,
	Thomas Gleixner, linux-arm-kernel, Scott Branden,
	Greg Kroah-Hartman, Frank Rowand, James Morse, Paul Mackerras,
	linuxppc-dev

On Thu, Oct 07, 2021 at 05:44:00AM +0900, Stafford Horne wrote:
> You have defined of_get_cpu_hwid to return u64, will this create compiler
> warnings when since we are storing a u64 into a u32?
> 
> It seems only if we make with W=3.

Yes.  This is done by -Wconversion, "Warn for implicit conversions that
may alter a value."

> I thought we usually warned on this.

This warning is not in -Wall or -Wextra either, it suffers too much from
false positives.  It is very natural to just ignore the high bits of
modulo types (which is what "unsigned" types *are*).  Or the bits that
"fall off" on a conversion.  The C standard makes this required
behaviour, it is useful, and it is the only convenient way of getting
this!


Segher

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 21:27     ` Segher Boessenkool
@ 2021-10-06 22:37       ` Stafford Horne
  2021-10-07  7:53       ` David Laight
  1 sibling, 0 replies; 29+ messages in thread
From: Stafford Horne @ 2021-10-06 22:37 UTC (permalink / raw)
  To: Segher Boessenkool
  Cc: Rob Herring, Rich Felker, Rafael J. Wysocki, linux-kernel,
	Guo Ren, H. Peter Anvin, linux-riscv, Will Deacon, Jonas Bonn,
	Florian Fainelli, Yoshinori Sato, linux-sh, x86, Russell King,
	linux-csky, Ingo Molnar, bcm-kernel-feedback-list,
	Catalin Marinas, Palmer Dabbelt, devicetree, Albert Ou, Ray Jui,
	Stefan Kristiansson, openrisc, Borislav Petkov, Paul Walmsley,
	Thomas Gleixner, linux-arm-kernel, Scott Branden,
	Greg Kroah-Hartman, Frank Rowand, James Morse, Paul Mackerras,
	linuxppc-dev

Hi Segher,

On Wed, Oct 06, 2021 at 04:27:28PM -0500, Segher Boessenkool wrote:
> On Thu, Oct 07, 2021 at 05:44:00AM +0900, Stafford Horne wrote:
> > You have defined of_get_cpu_hwid to return u64, will this create compiler
> > warnings when since we are storing a u64 into a u32?
> > 
> > It seems only if we make with W=3.
> 
> Yes.  This is done by -Wconversion, "Warn for implicit conversions that
> may alter a value."

Yeah, that is what I found out when I looked into it.

> > I thought we usually warned on this.
> 
> This warning is not in -Wall or -Wextra either, it suffers too much from
> false positives.  It is very natural to just ignore the high bits of
> modulo types (which is what "unsigned" types *are*).  Or the bits that
> "fall off" on a conversion.  The C standard makes this required
> behaviour, it is useful, and it is the only convenient way of getting
> this!

Thanks for the background, It does make sense. I guess I was confused with java
which requires casting when you store to a smaller size.  I.e.

    Test.java:5: error: incompatible types: possible lossy conversion from int to short
	s = i;

-Stafford

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (11 preceding siblings ...)
  2021-10-06 16:43 ` [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Rob Herring
@ 2021-10-07  2:24 ` Florian Fainelli
  2021-10-20 18:47 ` Rob Herring
  13 siblings, 0 replies; 29+ messages in thread
From: Florian Fainelli @ 2021-10-07  2:24 UTC (permalink / raw)
  To: Rob Herring, Russell King, James Morse, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Ray Jui, Scott Branden, bcm-kernel-feedback-list,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	openrisc, linuxppc-dev, linux-riscv, linux-sh, devicetree



On 10/6/2021 9:43 AM, Rob Herring wrote:
> The first 10 patches add a new function, of_get_cpu_hwid(), which parses
> CPU DT node 'reg' property, and then use it to replace all the open
> coded versions of parsing CPU node 'reg' properties.
> 
> The last 2 patches add support for populating the cacheinfo 'id' on DT
> platforms. The minimum associated CPU hwid is used for the id. The id is
> optional, but necessary for resctrl which is being adapted for Arm MPAM.
> 
> Tested on arm64. Compile tested on arm, x86 and powerpc.

On ARM and ARM64:

Tested-by: Florian Fainelli <f.fainelli@gmail.com>

lscpu -C continues to work on ARM64 as before with cache properties 
provided in the FDT.
-- 
Florian

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 03/12] ARM: broadcom: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 03/12] ARM: broadcom: " Rob Herring
@ 2021-10-07  2:24   ` Florian Fainelli
  0 siblings, 0 replies; 29+ messages in thread
From: Florian Fainelli @ 2021-10-07  2:24 UTC (permalink / raw)
  To: Rob Herring, Russell King, James Morse, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Ray Jui, Scott Branden, bcm-kernel-feedback-list,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	openrisc, linuxppc-dev, linux-riscv, linux-sh, devicetree



On 10/6/2021 9:43 AM, Rob Herring wrote:
> Replace open coded parsing of CPU nodes 'reg' property with
> of_get_cpu_hwid().
> 
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Ray Jui <rjui@broadcom.com>
> Cc: Scott Branden <sbranden@broadcom.com>
> Cc: bcm-kernel-feedback-list@broadcom.com
> Cc: Russell King <linux@armlinux.org.uk>
> Signed-off-by: Rob Herring <robh@kernel.org>

Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

^ permalink raw reply	[flat|nested] 29+ messages in thread

* RE: [PATCH 06/12] openrisc: Use of_get_cpu_hwid()
  2021-10-06 21:27     ` Segher Boessenkool
  2021-10-06 22:37       ` Stafford Horne
@ 2021-10-07  7:53       ` David Laight
  1 sibling, 0 replies; 29+ messages in thread
From: David Laight @ 2021-10-07  7:53 UTC (permalink / raw)
  To: 'Segher Boessenkool', Stafford Horne
  Cc: Rich Felker, Rafael J. Wysocki, Catalin Marinas, x86, Guo Ren,
	H. Peter Anvin, linux-riscv, Will Deacon, Jonas Bonn,
	Rob Herring, Florian Fainelli, Frank Rowand, linux-sh,
	Russell King, linux-csky, Ingo Molnar, bcm-kernel-feedback-list,
	James Morse, devicetree, Albert Ou, Ray Jui, Stefan Kristiansson,
	openrisc, Borislav Petkov, Paul Walmsley, Thomas Gleixner,
	linux-arm-kernel, Scott Branden, Yoshinori Sato, linux-kernel,
	Palmer Dabbelt, Greg Kroah-Hartman, Paul Mackerras, linuxppc-dev

From: Segher Boessenkool
> Sent: 06 October 2021 22:27
> 
> On Thu, Oct 07, 2021 at 05:44:00AM +0900, Stafford Horne wrote:
> > You have defined of_get_cpu_hwid to return u64, will this create compiler
> > warnings when since we are storing a u64 into a u32?
> >
> > It seems only if we make with W=3.
> 
> Yes.  This is done by -Wconversion, "Warn for implicit conversions that
> may alter a value."
> 
> > I thought we usually warned on this.

The microsoft compiler does - best to turn all those warnings off.

> This warning is not in -Wall or -Wextra either, it suffers too much from
> false positives.  It is very natural to just ignore the high bits of
> modulo types (which is what "unsigned" types *are*).  Or the bits that
> "fall off" on a conversion.  The C standard makes this required
> behaviour, it is useful, and it is the only convenient way of getting
> this!

I've also seen a compiler convert:
	struct->char_member = (char)(int_val & 0xff);
into:
	reg = int_val;
	reg &= 0xff; // for the & 0xff
	reg &= 0xff; // for the cast
	struct->char_member = low_8bits(reg);

You really don't want the extra noise.

I'll bet that (char)int_val is actually an arithmetic expression.
So its type will be 'int'.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)


^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 04/12] arm64: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
@ 2021-10-07  8:07   ` Will Deacon
  2021-10-18 13:27   ` Sudeep Holla
  1 sibling, 0 replies; 29+ messages in thread
From: Will Deacon @ 2021-10-07  8:07 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Catalin Marinas, Guo Ren, Jonas Bonn,
	Stefan Kristiansson, Stafford Horne, Michael Ellerman,
	Paul Walmsley, Palmer Dabbelt, Albert Ou, Yoshinori Sato,
	Rich Felker, x86, Greg Kroah-Hartman, Florian Fainelli, Ray Jui,
	Scott Branden, bcm-kernel-feedback-list, Benjamin Herrenschmidt,
	Paul Mackerras, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
	H. Peter Anvin, Rafael J. Wysocki, Frank Rowand,
	linux-arm-kernel, linux-kernel, linux-csky, openrisc,
	linuxppc-dev, linux-riscv, linux-sh, devicetree

On Wed, Oct 06, 2021 at 11:43:24AM -0500, Rob Herring wrote:
> Replace the open coded parsing of CPU nodes' 'reg' property with
> of_get_cpu_hwid().
> 
> This change drops an error message for missing 'reg' property, but that
> should not be necessary as the DT tools will ensure 'reg' is present.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>  arch/arm64/kernel/smp.c | 31 ++-----------------------------
>  1 file changed, 2 insertions(+), 29 deletions(-)

Acked-by: Will Deacon <will@kernel.org>

It's a shame INVALID_HWID can't be removed too, but looks like it's still
used in a couple of places.

Will

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 07/12] powerpc: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 07/12] powerpc: " Rob Herring
@ 2021-10-08 11:01   ` Michael Ellerman
  0 siblings, 0 replies; 29+ messages in thread
From: Michael Ellerman @ 2021-10-08 11:01 UTC (permalink / raw)
  To: Rob Herring, Russell King, James Morse, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

Rob Herring <robh@kernel.org> writes:
> Replace open coded parsing of CPU nodes' 'reg' property with
> of_get_cpu_hwid().
>
> Cc: Michael Ellerman <mpe@ellerman.id.au>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>  arch/powerpc/kernel/smp.c | 7 +------
>  1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> index 9cc7d3dbf439..d96b0e361a73 100644
> --- a/arch/powerpc/kernel/smp.c
> +++ b/arch/powerpc/kernel/smp.c
> @@ -1313,18 +1313,13 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
>  int cpu_to_core_id(int cpu)
>  {
>  	struct device_node *np;
> -	const __be32 *reg;
>  	int id = -1;
>  
>  	np = of_get_cpu_node(cpu, NULL);
>  	if (!np)
>  		goto out;
>  
> -	reg = of_get_property(np, "reg", NULL);
> -	if (!reg)
> -		goto out;
> -
> -	id = be32_to_cpup(reg);
> +	id = of_get_cpu_hwid(np, 0);
>  out:
>  	of_node_put(np);
>  	return id;

This looks OK to me.

All the systems I can find have a /cpus/#address-cells of 1, so the
change to use of_n_addr_cells() in of_get_cpu_hwid() should be fine.

I booted it on a bunch of systems with no issues.

Acked-by: Michael Ellerman <mpe@ellerman.id.au>

cheers

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes
  2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
@ 2021-10-18 13:26   ` Sudeep Holla
  0 siblings, 0 replies; 29+ messages in thread
From: Sudeep Holla @ 2021-10-18 13:26 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Sudeep Holla, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman,
	Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

On Wed, Oct 06, 2021 at 11:43:21AM -0500, Rob Herring wrote:
> There are various open coded implementions parsing the CPU node 'reg'
> property which contains the CPU's hardware ID. Introduce a new function,
> of_get_cpu_hwid(), to read the hardware ID.
>
> All the callers should be DT only code, so no need for an empty
> function.
>

Thanks for doing this. I postponed and forgot about this though I had
planned for this when I touched code around this.

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

--
Regards,
Sudeep

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 04/12] arm64: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
  2021-10-07  8:07   ` Will Deacon
@ 2021-10-18 13:27   ` Sudeep Holla
  1 sibling, 0 replies; 29+ messages in thread
From: Sudeep Holla @ 2021-10-18 13:27 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Sudeep Holla, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman,
	Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

On Wed, Oct 06, 2021 at 11:43:24AM -0500, Rob Herring wrote:
> Replace the open coded parsing of CPU nodes' 'reg' property with
> of_get_cpu_hwid().
> 
> This change drops an error message for missing 'reg' property, but that
> should not be necessary as the DT tools will ensure 'reg' is present.
> 

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id'
  2021-10-06 16:43 ` [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
@ 2021-10-18 13:30   ` Sudeep Holla
  0 siblings, 0 replies; 29+ messages in thread
From: Sudeep Holla @ 2021-10-18 13:30 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Catalin Marinas, Sudeep Holla,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman,
	Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

On Wed, Oct 06, 2021 at 11:43:31AM -0500, Rob Herring wrote:
> In preparation to set the cache 'id' based on the CPU h/w ids, allow for
> 64-bit bit 'id' value. The only case that needs this is arm64, so
> unsigned long is sufficient.
> 

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data
  2021-10-06 16:43 ` [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Rob Herring
@ 2021-10-18 13:31   ` Sudeep Holla
  0 siblings, 0 replies; 29+ messages in thread
From: Sudeep Holla @ 2021-10-18 13:31 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Sudeep Holla, Catalin Marinas,
	Will Deacon, Guo Ren, Jonas Bonn, Stefan Kristiansson,
	Stafford Horne, Michael Ellerman, Paul Walmsley, Palmer Dabbelt,
	Albert Ou, Yoshinori Sato, Rich Felker, x86, Greg Kroah-Hartman,
	Florian Fainelli, Ray Jui, Scott Branden,
	bcm-kernel-feedback-list, Benjamin Herrenschmidt, Paul Mackerras,
	Thomas Gleixner, Ingo Molnar, Borislav Petkov, H. Peter Anvin,
	Rafael J. Wysocki, Frank Rowand, linux-arm-kernel, linux-kernel,
	linux-csky, openrisc, linuxppc-dev, linux-riscv, linux-sh,
	devicetree

On Wed, Oct 06, 2021 at 11:43:32AM -0500, Rob Herring wrote:
> Use the minimum CPU h/w id of the CPUs associated with the cache for the
> cache 'id'. This will provide a stable id value for a given system. As
> we need to check all possible CPUs, we can't use the shared_cpu_map
> which is just online CPUs. As there's not a cache to CPUs mapping in DT,
> we have to walk all CPU nodes and then walk cache levels.
> 

Acked-by: Sudeep Holla <sudeep.holla@arm.com>

-- 
Regards,
Sudeep

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support
  2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
                   ` (12 preceding siblings ...)
  2021-10-07  2:24 ` [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Florian Fainelli
@ 2021-10-20 18:47 ` Rob Herring
  13 siblings, 0 replies; 29+ messages in thread
From: Rob Herring @ 2021-10-20 18:47 UTC (permalink / raw)
  To: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, Rich Felker, X86 ML, Greg Kroah-Hartman
  Cc: Florian Fainelli, Ray Jui, Scott Branden,
	maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	Openrisc, linuxppc-dev, linux-riscv, SH-Linux, devicetree

On Wed, Oct 6, 2021 at 11:43 AM Rob Herring <robh@kernel.org> wrote:
>
> The first 10 patches add a new function, of_get_cpu_hwid(), which parses
> CPU DT node 'reg' property, and then use it to replace all the open
> coded versions of parsing CPU node 'reg' properties.
>
> The last 2 patches add support for populating the cacheinfo 'id' on DT
> platforms. The minimum associated CPU hwid is used for the id. The id is
> optional, but necessary for resctrl which is being adapted for Arm MPAM.
>
> Tested on arm64. Compile tested on arm, x86 and powerpc.
>
> Rob
>
> Rob Herring (12):
>   of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes
>   ARM: Use of_get_cpu_hwid()
>   ARM: broadcom: Use of_get_cpu_hwid()
>   arm64: Use of_get_cpu_hwid()
>   csky: Use of_get_cpu_hwid()
>   openrisc: Use of_get_cpu_hwid()
>   powerpc: Use of_get_cpu_hwid()
>   riscv: Use of_get_cpu_hwid()
>   sh: Use of_get_cpu_hwid()
>   x86: dt: Use of_get_cpu_hwid()
>   cacheinfo: Allow for >32-bit cache 'id'
>   cacheinfo: Set cache 'id' based on DT data

I've fixed up the openrisc error and applied 1-10 to the DT tree.

The cacheinfo part is going to need some more work. I've found I will
need the cache affinity (of possible cpus) as well, so I plan to also
store the affinity instead of looping thru caches and cpus again.

Rob

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH 09/12] sh: Use of_get_cpu_hwid()
  2021-10-06 16:43 ` [PATCH 09/12] sh: " Rob Herring
@ 2021-10-27 14:26   ` Rich Felker
  0 siblings, 0 replies; 29+ messages in thread
From: Rich Felker @ 2021-10-27 14:26 UTC (permalink / raw)
  To: Rob Herring
  Cc: Russell King, James Morse, Catalin Marinas, Will Deacon, Guo Ren,
	Jonas Bonn, Stefan Kristiansson, Stafford Horne,
	Michael Ellerman, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Yoshinori Sato, x86, Greg Kroah-Hartman, Florian Fainelli,
	Ray Jui, Scott Branden, bcm-kernel-feedback-list,
	Benjamin Herrenschmidt, Paul Mackerras, Thomas Gleixner,
	Ingo Molnar, Borislav Petkov, H. Peter Anvin, Rafael J. Wysocki,
	Frank Rowand, linux-arm-kernel, linux-kernel, linux-csky,
	openrisc, linuxppc-dev, linux-riscv, linux-sh, devicetree

On Wed, Oct 06, 2021 at 11:43:29AM -0500, Rob Herring wrote:
> Replace open coded parsing of CPU nodes' 'reg' property with
> of_get_cpu_hwid().
> 
> Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
> Cc: Rich Felker <dalias@libc.org>
> Cc: linux-sh@vger.kernel.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>  arch/sh/boards/of-generic.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 921d76fc3358..f7f3e618e85b 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -62,9 +62,8 @@ static void sh_of_smp_probe(void)
>  	init_cpu_possible(cpumask_of(0));
>  
>  	for_each_of_cpu_node(np) {
> -		const __be32 *cell = of_get_property(np, "reg", NULL);
> -		u64 id = -1;
> -		if (cell) id = of_read_number(cell, of_n_addr_cells(np));
> +		u64 id = of_get_cpu_hwid(np, 0);
> +
>  		if (id < NR_CPUS) {
>  			if (!method)
>  				of_property_read_string(np, "enable-method", &method);
> -- 
> 2.30.2

Acked-by: Rich Felker <dalias@libc.org>

^ permalink raw reply	[flat|nested] 29+ messages in thread

end of thread, other threads:[~2021-10-27 14:27 UTC | newest]

Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-06 16:43 [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Rob Herring
2021-10-06 16:43 ` [PATCH 01/12] of: Add of_get_cpu_hwid() to read hardware ID from CPU nodes Rob Herring
2021-10-18 13:26   ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 02/12] ARM: Use of_get_cpu_hwid() Rob Herring
2021-10-06 16:43 ` [PATCH 03/12] ARM: broadcom: " Rob Herring
2021-10-07  2:24   ` Florian Fainelli
2021-10-06 16:43 ` [PATCH 04/12] arm64: " Rob Herring
2021-10-07  8:07   ` Will Deacon
2021-10-18 13:27   ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 05/12] csky: " Rob Herring
2021-10-06 16:43 ` [PATCH 06/12] openrisc: " Rob Herring
2021-10-06 20:44   ` Stafford Horne
2021-10-06 21:08     ` Rob Herring
2021-10-06 21:25       ` Stafford Horne
2021-10-06 21:27     ` Segher Boessenkool
2021-10-06 22:37       ` Stafford Horne
2021-10-07  7:53       ` David Laight
2021-10-06 16:43 ` [PATCH 07/12] powerpc: " Rob Herring
2021-10-08 11:01   ` Michael Ellerman
2021-10-06 16:43 ` [PATCH 08/12] riscv: " Rob Herring
2021-10-06 16:43 ` [PATCH 09/12] sh: " Rob Herring
2021-10-27 14:26   ` Rich Felker
2021-10-06 16:43 ` [PATCH 10/12] x86: dt: " Rob Herring
2021-10-06 16:43 ` [PATCH 11/12] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
2021-10-18 13:30   ` Sudeep Holla
2021-10-06 16:43 ` [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Rob Herring
2021-10-18 13:31   ` Sudeep Holla
2021-10-07  2:24 ` [PATCH 00/12] DT: CPU h/w id parsing clean-ups and cacheinfo id support Florian Fainelli
2021-10-20 18:47 ` Rob Herring

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