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From: Vineet.Gupta1@synopsys.com (Vineet Gupta)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH 4/6] ARC: mm: tlb flush optim: Make TLBWriteNI fallback to TLBWrite if not available
Date: Mon, 16 Sep 2019 14:32:05 -0700
Message-ID: <20190916213207.12792-5-vgupta@synopsys.com> (raw)
In-Reply-To: <20190916213207.12792-1-vgupta@synopsys.com>

TLBWriteNI was introduced in MMUv2 (to not invalidate uTLBs in Fast Path
TLB Refill Handler). To avoid #ifdef'ery make it fallback to TLBWrite availabel on all MMUs. This will also help with next change

Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/include/asm/mmu.h | 2 ++
 arch/arc/mm/tlbex.S        | 4 ----
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index 0abacb82a72b..26b731d32a2b 100644
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -67,6 +67,8 @@
 #if (CONFIG_ARC_MMU_VER >= 2)
 #define TLBWriteNI  0x5		/* write JTLB without inv uTLBs */
 #define TLBIVUTLB   0x6		/* explicitly inv uTLBs */
+#else
+#define TLBWriteNI  TLBWrite	/* Not present in hardware, fallback */
 #endif
 
 #if (CONFIG_ARC_MMU_VER >= 4)
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 4c88148d4cd1..2efaf6ca0c06 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -292,11 +292,7 @@ ex_saved_reg1:
 	sr  TLBGetIndex, [ARC_REG_TLBCOMMAND]
 
 	/* Commit the Write */
-#if (CONFIG_ARC_MMU_VER >= 2)   /* introduced in v2 */
 	sr TLBWriteNI, [ARC_REG_TLBCOMMAND]
-#else
-	sr TLBWrite, [ARC_REG_TLBCOMMAND]
-#endif
 
 #else
 	sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]
-- 
2.20.1

  parent reply index

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-16 21:32 [PATCH 0/6] ARC MMU code updates Vineet.Gupta1
2019-09-16 21:32 ` [PATCH 1/6] ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg Vineet.Gupta1
2019-09-16 21:32 ` [PATCH 2/6] ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD Vineet.Gupta1
2019-09-16 21:32 ` [PATCH 3/6] ARC: mm: TLB Miss optim: avoid re-reading ECR Vineet.Gupta1
2019-09-16 23:36   ` Alexey.Brodkin
2019-09-17 21:08     ` vineetg76
2019-09-16 21:32 ` Vineet.Gupta1 [this message]
2019-09-16 21:32 ` [PATCH 5/6] ARC: mm: tlb flush optim: elide repeated uTLB invalidate in loop Vineet.Gupta1
2019-09-16 21:32 ` [PATCH 6/6] ARC: mm: tlb flush optim: elide redundant uTLB invalidates for MMUv3 Vineet.Gupta1

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