From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: Re: [PATCH RFC 0/2] Add Renesas RPC-IF support Date: Wed, 11 Dec 2019 19:20:51 +0300 Message-ID: <0af05149-78f5-8639-4a23-84edda0073ea@cogentembedded.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: Mark Rutland , "linux-kernel@vger.kernel.org" , Philipp Zabel , Mason Yang , "linux-spi@vger.kernel.org" To: Chris Brandt , Rob Herring , "devicetree@vger.kernel.org" Return-path: In-Reply-To: Content-Language: en-MW Sender: linux-kernel-owner@vger.kernel.org List-Id: linux-spi.vger.kernel.org On 12/11/2019 05:33 PM, Chris Brandt wrote: >> Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count >> Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC to >> be accessed via the external address space read mode or the manual mode. > > Looking at this driver, all it is are APIs. Meaning another driver is > needed to sit in between the MTD layer and this HW driver layer. > > In the driver that I did, if the "RPC" HW is going to be used to control > a SPI Flash device, it registered a spi controller and then the MTD > layer could access the device Via the SPI-to-MTD sublayer for (at least) direct mapping -- grep for "dirmap" in drivers/mtd/spi-nor/spi-nor.c... > just like any other SPI controller driver. No > additional drivers are needed. Then why do we have *struct* spi_controller_mem_ops? Do All drivers implement such ops? [...] MBR, Sergei