From: Bryan Wu <bryan.wu@analog.com>
To: David Brownell <david-b@pacbell.net>
Cc: Bryan Wu <bryan.wu@analog.com>,
spi-devel-general@lists.sourceforge.net,
linux-kernel@vger.kernel.org,
Sonic Zhang <sonic.zhang@analog.com>
Subject: Re: [PATCH 09/14] Blackfin SPI driver: Fix SPI driver to work with SPI flash ST25P16 on bf548
Date: Wed, 31 Oct 2007 14:50:31 +0800 [thread overview]
Message-ID: <1193813431.6971.24.camel@roc-laptop> (raw)
In-Reply-To: <200710301305.02640.david-b@pacbell.net>
On Tue, 2007-10-30 at 13:05 -0700, David Brownell wrote:
> On Tuesday 30 October 2007, Bryan Wu wrote:
> > Current SPI driver enables SPI controller and set the SPI baud register
> > for each SPI transfer. But, they should never be changed within a SPI
> > message session, in which seveal SPI transfers are pumped.
>
> That's actually not true. If a driver sets spi_transfer.max_speed_hz
> to a nonzero value that's different from the previous bit rate (which
> may be spi_device.max_speed_hz), it should be updated before that
> transfer segment. Example, sometimes data can't be clocked out at
> the same rate commands can be clocked in.
>
> Similarly with spi_transfer.bits_per_word ... again, it's very possible
> that commands and data have different sizes.
>
I agree with you here.
Maybe there are some confusion of mixing up the spi_trasnfer.speed_hz
with the spi_device.max_speed_hz.
spi_device.max_speed_hz comes from spi_board_info.max_speed_hz, it is
for the default max speed value.
spi_transfer.speed_hz comes from upper applications for each spi
transfer setting.
Am I right?
I will fix this later.
> Of course, if those values don't change, there'd be no point in
> reconfiguring any aspect of those communications parameters...
>
>
> I'll be forwarding this patch, since this looks like another case
> where the main effect of the patch doesn't match its description
> and since this patch series has taken too long already. (Does this
> patch even really relate primarily to working with an ST M25P16
> flash part??) Though it'd be reasonable to be more hard-nosed
> about this and insist on another go-around for thesse patches.
> (Making this the fifth one??)
>
> But I *STRONGLY* suggest someone revisit the issue of whether those
> two per-transfer options are now being handled correctly. As well
> as update procedures so that the patch comments start to have a
> direct correspondence to what the patches have changed...
>
OK, we will test this on our hardware.
Thanks, Dave
-Bryan Wu
next prev parent reply other threads:[~2007-10-31 6:50 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-30 9:17 [PATCH 00/14] Blackfin on-chip SPI controller driver updates and bug-fixing Bryan Wu
[not found] ` <1193735885-8202-1-git-send-email-bryan.wu-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
2007-10-30 9:17 ` [PATCH 01/14] Blackfin SPI driver: Initial supporting BF54x in SPI driver Bryan Wu
2007-10-30 9:17 ` [PATCH 02/14] Blackfin SPI driver: use new GPIO API and add error handling Bryan Wu
2007-10-30 9:17 ` [PATCH 03/14] Blackfin SPI driver: add error handing Bryan Wu
2007-10-30 9:17 ` [PATCH 04/14] Blackfin SPI driver: Blackfin SPI driver does not respect the per-transfer cs_change field Bryan Wu
2007-10-30 9:17 ` [PATCH 05/14] Blackfin SPI driver: prevent people from setting bits in ctl_reg Bryan Wu
2007-10-30 9:17 ` [PATCH 06/14] Blackfin SPI driver: update spi driver to support multi-ports Bryan Wu
2007-10-30 9:17 ` [PATCH 07/14] Blackfin SPI driver: Add SPI master controller platform device 1 Bryan Wu
2007-10-30 19:08 ` David Brownell
[not found] ` <200710301208.13367.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-31 4:18 ` Bryan Wu
2007-10-30 9:17 ` [PATCH 08/14] Blackfin SPI driver: Move GPIO config to setup and cleanup Bryan Wu
2007-10-30 9:18 ` [PATCH 09/14] Blackfin SPI driver: Fix SPI driver to work with SPI flash ST25P16 on bf548 Bryan Wu
2007-10-30 20:05 ` David Brownell
2007-10-31 6:50 ` Bryan Wu [this message]
2007-10-31 7:11 ` David Brownell
[not found] ` <200710310011.33545.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-31 7:35 ` Bryan Wu
2007-10-31 8:02 ` David Brownell
[not found] ` <200710310102.36542.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-31 8:52 ` Bryan Wu
2007-10-31 8:33 ` Mike Frysinger
[not found] ` <8bd0f97a0710310133m7b5cbbf3j545a489c401185df-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2007-10-31 19:01 ` David Brownell
[not found] ` <200710311201.29643.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-31 19:16 ` Mike Frysinger
[not found] ` <8bd0f97a0710311216l25f89b37v356fd44d7c1999da-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2007-10-31 20:14 ` David Brownell
2007-10-30 9:18 ` [PATCH 10/14] Blackfin SPI driver: Clean up useless wait in bfin SPI driver Bryan Wu
2007-10-30 9:18 ` [PATCH 11/14] Blackfin SPI driver: Move global SPI regs_base and dma_ch to struct driver_data Bryan Wu
2007-10-30 9:18 ` [PATCH 12/14] Blackfin SPI driver: Fix bug in u16_cs_chg_reader to read data_len-2 bytes data firstly, then read out the last 2 bytes data Bryan Wu
2007-10-30 9:18 ` [PATCH 13/14] Blackfin SPI driver: Move cs_chg_udelay to cs_deactive to fix bug when some SPI LCD driver needs delay after cs_deactive Bryan Wu
[not found] ` <1193735885-8202-14-git-send-email-bryan.wu-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
2007-10-30 20:18 ` David Brownell
[not found] ` <200710301319.00071.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-31 6:30 ` Bryan Wu
2007-10-31 19:04 ` Cameron Barfield
2007-10-30 9:18 ` [PATCH 14/14] Blackfin SPI driver: set correct baud for spi mmc and enable SPI after DMA Bryan Wu
2007-10-30 20:24 ` [PATCH 00/14] Blackfin on-chip SPI controller driver updates and bug-fixing David Brownell
[not found] ` <200710301324.07691.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-30 20:29 ` Mike Frysinger
[not found] ` <8bd0f97a0710301329i8a21b22ncc9f71a81bc06543-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2007-10-30 20:42 ` David Brownell
[not found] ` <200710301342.18559.david-b-yBeKhBN/0LDR7s880joybQ@public.gmane.org>
2007-10-30 20:54 ` David Brownell
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