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From: Bryan Wu <cooloney-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: dbrownell-Rn4VEauK+AKRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
	akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org
Cc: spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Michael Hennerich
	<michael.hennerich-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 19/20] Blackfin SPI Driver: Add GPIO controlled SPI Slave Select support
Date: Fri,  6 Feb 2009 15:13:07 +0800	[thread overview]
Message-ID: <1233904388-5765-20-git-send-email-cooloney@kernel.org> (raw)
In-Reply-To: <1233904388-5765-1-git-send-email-cooloney-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

From: Michael Hennerich <michael.hennerich-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>

This patch adds support for GPIO controlled SPI Chip Selects.
To make use of this feature, set chip_select = 0 and add a proper
cs_gpio to your controller_data.

struct spi_board_info
        .chip_select = 0

struct bfin5xx_spi_chip
        .cs_gpio = GPIO_P###

There are various SPI devices that require SPI MODE_0,
and need to have the Chip Selects asserted during the entire transfer.
Consider using SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows
it.

Signed-off-by: Michael Hennerich <michael.hennerich-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
Signed-off-by: Bryan Wu <cooloney-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 arch/blackfin/include/asm/bfin5xx_spi.h |    1 +
 drivers/spi/spi_bfin5xx.c               |   40 ++++++++++++++++++++++++------
 2 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index e1bb164..da8b9ca 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -124,6 +124,7 @@ struct bfin5xx_spi_chip {
 	u8 bits_per_word;
 	u8 cs_change_per_word;
 	u16 cs_chg_udelay; /* Some devices require 16-bit delays */
+	u32 cs_gpio;
 };
 
 #endif /* _SPI_CHANNEL_H_ */
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 9459c42..3e63a5d 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -111,6 +111,7 @@ struct chip_data {
 	u8 bits_per_word;	/* 8 or 16 */
 	u8 cs_change_per_word;
 	u16 cs_chg_udelay;	/* Some devices require > 255usec delay */
+	u32 cs_gpio;
 	void (*write) (struct driver_data *);
 	void (*read) (struct driver_data *);
 	void (*duplex) (struct driver_data *);
@@ -177,22 +178,30 @@ static int bfin_spi_flush(struct driver_data *drv_data)
 /* Chip select operation functions for cs_change flag */
 static void bfin_spi_cs_active(struct driver_data *drv_data, struct chip_data *chip)
 {
-	u16 flag = read_FLAG(drv_data);
+	if (likely(chip->chip_select_num)) {
+		u16 flag = read_FLAG(drv_data);
 
-	flag |= chip->flag;
-	flag &= ~(chip->flag << 8);
+		flag |= chip->flag;
+		flag &= ~(chip->flag << 8);
 
-	write_FLAG(drv_data, flag);
+		write_FLAG(drv_data, flag);
+	} else {
+		gpio_set_value(chip->cs_gpio, 0);
+	}
 }
 
 static void bfin_spi_cs_deactive(struct driver_data *drv_data, struct chip_data *chip)
 {
-	u16 flag = read_FLAG(drv_data);
+	if (likely(chip->chip_select_num)) {
+		u16 flag = read_FLAG(drv_data);
 
-	flag &= ~chip->flag;
-	flag |= (chip->flag << 8);
+		flag &= ~chip->flag;
+		flag |= (chip->flag << 8);
 
-	write_FLAG(drv_data, flag);
+		write_FLAG(drv_data, flag);
+	} else {
+		gpio_set_value(chip->cs_gpio, 1);
+	}
 
 	/* Move delay here for consistency */
 	if (chip->cs_chg_udelay)
@@ -1036,6 +1045,7 @@ static int bfin_spi_setup(struct spi_device *spi)
 	struct bfin5xx_spi_chip *chip_info = NULL;
 	struct chip_data *chip;
 	struct driver_data *drv_data = spi_master_get_devdata(spi->master);
+	int ret;
 
 	/* Abort device setup if requested features are not supported */
 	if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) {
@@ -1081,6 +1091,7 @@ static int bfin_spi_setup(struct spi_device *spi)
 		chip->bits_per_word = chip_info->bits_per_word;
 		chip->cs_change_per_word = chip_info->cs_change_per_word;
 		chip->cs_chg_udelay = chip_info->cs_chg_udelay;
+		chip->cs_gpio = chip_info->cs_gpio;
 	}
 
 	/* translate common spi framework into our register */
@@ -1121,6 +1132,16 @@ static int bfin_spi_setup(struct spi_device *spi)
 	chip->flag = 1 << (spi->chip_select);
 	chip->chip_select_num = spi->chip_select;
 
+	if (chip->chip_select_num == 0) {
+		ret = gpio_request(chip->cs_gpio, spi->modalias);
+		if (ret) {
+			if (drv_data->dma_requested)
+				free_dma(drv_data->dma_channel);
+			return ret;
+		}
+		gpio_direction_output(chip->cs_gpio, 1);
+	}
+
 	switch (chip->bits_per_word) {
 	case 8:
 		chip->n_bytes = 1;
@@ -1186,6 +1207,9 @@ static void bfin_spi_cleanup(struct spi_device *spi)
 		peripheral_free(ssel[spi->master->bus_num]
 					[chip->chip_select_num-1]);
 
+	if (chip->chip_select_num == 0)
+		gpio_free(chip->cs_gpio);
+
 	kfree(chip);
 }
 
-- 
1.5.6.3

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  parent reply	other threads:[~2009-02-06  7:13 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-02-06  7:12 [PATCH 00/20] Blackfin SPI Driver fixing and updates Bryan Wu
     [not found] ` <1233904388-5765-1-git-send-email-cooloney-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2009-02-06  7:12   ` [PATCH 01/20] Blackfin SPI Driver: ensure cache coherency before doing DMA Bryan Wu
2009-02-06  7:12   ` [PATCH 02/20] Blackfin SPI Driver: Fix erroneous SPI Clock divisor calculation Bryan Wu
2009-02-06  7:12   ` [PATCH 03/20] Blackfin SPI Driver: remove useless <asm/cplbinit.h> Bryan Wu
2009-02-06  7:12   ` [PATCH 04/20] Blackfin SPI Driver: use len_in_bytes when we care about the number of bytes transferred Bryan Wu
2009-02-06  7:12   ` [PATCH 05/20] Blackfin SPI Driver: pass DMA overflow error to the higher level Bryan Wu
2009-02-06  7:12   ` [PATCH 06/20] Blackfin SPI Driver: unify duplicated code in dma read/write paths Bryan Wu
2009-02-06  7:12   ` [PATCH 07/20] Blackfin SPI Driver: drop bogus cast and touchup dma label Bryan Wu
2009-02-06  7:12   ` [PATCH 08/20] Blackfin SPI Driver: add a few more DMA debug messages Bryan Wu
2009-02-06  7:12   ` [PATCH 09/20] Blackfin SPI Driver: do not check for SPI errors if DMA itself did not flag any Bryan Wu
2009-02-06  7:12   ` [PATCH 10/20] Blackfin SPI Driver: use the properl BIT_CTL_xxx defines Bryan Wu
2009-02-06  7:12   ` [PATCH 11/20] Blackfin SPI Driver: SPI slave select code cleanup Bryan Wu
2009-02-06  7:13   ` [PATCH 12/20] Blackfin SPI Driver: get dma working for SPI flashes Bryan Wu
2009-02-06  7:13   ` [PATCH 13/20] Blackfin SPI Driver: add timeout while waiting for SPIF in dma irq handler Bryan Wu
2009-02-06  7:13   ` [PATCH 14/20] Blackfin SPI Driver: tweak magic spi dma sequence to get it working on BF54x Bryan Wu
2009-02-06  7:13   ` [PATCH 15/20] Blackfin SPI Driver: fix bug - spi controller driver does not assert/deassert CS correctly Bryan Wu
2009-02-06  7:13   ` [PATCH 16/20] Blackfin SPI Driver: fix bug - correct usage of struct spi_transfer.cs_change Bryan Wu
2009-02-06  7:13   ` [PATCH 17/20] Blackfin SPI Driver: use bfin_spi_ prefix on all functions Bryan Wu
2009-02-06  7:13   ` [PATCH 18/20] Blackfin SPI Driver: fix NULL pointer crash Bryan Wu
2009-02-06  7:13   ` Bryan Wu [this message]
2009-02-06  7:13   ` [PATCH 20/20] Blackfin SPI Driver: Make mmc_spi driver work on Blackfin Bryan Wu

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